2026第 31 届 DesignCon技术展PPT资料合集（共166套打包）

更新时间：2026-04-21 报告数量：166份

2026第 31 DesignCon技术展PPT资料合集

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2026第 31 届 DesignCon技术展PPT资料合集

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- 2026第 31 届 DesignCon技术展PPT资料合集
  - DCON26_SLIDES_Track2_ModelingTransmitterwithBoostingCapacitorbasedonPlugged-inBehaviorIBIS_166_139.pdf
  - DCON26_SLIDES_Track13_PortReferencinginS-ParametersCriticalInsightsYouNeedtoKnow_213_115.pdf
  - DCON26_SLIDES_Track13_HowtoDesignPredictableInterconnectsUpto448Gbps_201_192.pdf
  - DCON26_SLIDES_Track12_PracticalSemi-AutomatedApproachforSignalIntegrityTestingofHigh-SpeedHigh-DensityCable_183_180.pdf
  - DCON26_SLIDES_Track14_AI-DrivenThermal-AwareDataCenterCapacityPlanning_102_162.pdf
  - DCON26_SLIDES_Track13_Keynote朏romSpookyActionataDistancetotheQuantumInternet_302_113.pdf
  - DCON26_SLIDES_Track12_UncertaintyLoomsLargeImprovingtheAccuracyofStepLoadTesting_54_126.pdf
  - DCON26_SLIDES_Track13_ViaFan-OutDesignsfor448GbpsSIvsTechnology_109_117.pdf
  - DCON26_SLIDES_Track12_AdaptiveScopeNoiseRemovalAPracticalTrade-OffBetweenMeasurementBiasandVariation_90_120.pdf
  - DCON26_SLIDES_Track12_Tutorial朥nderstandingTestFixtureDe-EmbeddingforAccurateS-ParameterCharacterizationof_291_128.pdf
  - DCON26_SLIDES_Track13_MultimodeResonanceSuppressionPAM4EyeDecompositionfor212.5-GbpsOSFP_88_114.pdf
  - DCON26_SLIDES_Track15_Tutorial-SynergisticAutomotiveControlsofDynamicsEfficiencyforVehicleElectrification_15_88.pdf
  - DCON26_SLIDES_Track13_Near-ChipCopackagedCopperCopackagedOpticsInterconnects_58_165.pdf
  - DCON26_SLIDES_Track13_BreakingtheBandwidthBarrierTestFixturesandMethodologiesfor448GbpsDataTransmission_167_226.pdf
  - DCON26_SLIDES_Track12_PerformanceCriteriaPracticalImplementationofDe-embeddingTestFixturesfor200GbsPerLaneC_189_118.pdf
  - DCON26_SLIDES_Track12_BridgingtheGapBetweenSimulationMeasurementinDDR5TechniquesforImprovedCorrelation_182_123.pdf
  - DCON26_SLIDES_Track12_Connector-FreeTerminationforFEXTMeasurementsUsingAbsorbersonBGAPads_233_125.pdf
  - DCON26_SLIDES_Track11_TargetedEMIMitigationUsingEmissionSourceImaging3D-PrintedAbsorbers_244_129.pdf
  - DCON26_SLIDES_Track10_BridgingtheTime-FrequencyChasminPDNDesignLeveragingCumulativePower-railNoiseReversePu_206_135.pdf
  - DCON26_SLIDES_Track09_PAMXmYModulationProposalfor448G_89_171.pdf
  - DCON26_SLIDES_Track08_JitterDecompositionMethodology4-PhaseSkewCharacterizationforHigh-SpeedDRAMInterfaces_76_142.pdf
  - DCON26_SLIDES_Track09_TutorialPAM6SignalingAProspectiveCandidatefor448GbpsperLane_37_204.pdf
  - DCON26_SLIDES_Track8_AWG-AssistedLowNoisePhysicalChannelDigitalizationfor112GbpsPAM4ITOLJOTLVerification_126_122.pdf
  - DCON26_SLIDES_Track07_PCBViaPlate-ModeLossInfluenceofViaDesignParameters_73_154.pdf
  - DCON26_SLIDES_Track13_ImpactAnalysisofPackageManufacturingProcessVariationsAcrossDifferentDesignScenarios_164_111.pdf
  - DCON26_SLIDES_Track12_MetrologyStatisticalProcessControlTechniquesfor224G448GSkewManagement_129_160.pdf
  - DCON26_SLIDES_Track12_ManualMicro-probesforOne-PortPCBCharacterizationwithaSingleTouchdown_234_197.pdf
  - DCON26_SLIDES_Track07_CrosstalkSensitivityNewFindingonPCIe7.0ChannelThroughS-ParameterManipulation_256_151.pdf
  - DCON26_SLIDES_Track11_Tutorial朇haracterizingDebuggingtheTopThreeEMCIssuesRadiatedEmissionsRadiatedImmunity_134_131.pdf
  - DCON26_SLIDES_Track06_Tutorial_ESDProtectionforModernHigh-SpeedInterfaces_173_107.pdf
  - DCON26_SLIDES_Track10_StabilityMore朑oingBeyondBodeStabilityAssessment_265_138.pdf
  - DCON26_SLIDES_Track10_ModelingMeasuringLargeSignalPDNCrosstalkGroundBouncewithaMulti-PhaseVRMSystemUsingaFa_105_136.pdf
  - DCON26_SLIDES_Track14_HolisticDesignOptimizationof3D-ICPackageSubstrateInterconnectionsinMultiplePowerDomai_197_108.pdf
  - DCON26_SLIDES_Track09_AnalysisofHigh-OrderPulseAmplitudeModulationfor400GbsperlaneinEthernetforAI_31_184.pdf
  - DCON26_SLIDES_Track06_APerformanceEvaluationMethodofElectrical-OpticalChannelCouplingfor112G224GLPORTLRBase_114_124.pdf
  - DCON26_SLIDES_Track09_SEMIMOSignalingCanitSave400G_84_140.pdf
  - DCON26_SLIDES_Track13_AcceleratingHigh-SpeedConnectorBreakoutwithPredictiveMachineLearningPhysics-GuidedIns_46_89.pdf
  - DCON26_SLIDES_Track07_Tutorial朎nabling224G448GCo-PackagedCopperArchitectures_252_155.pdf
  - DCON26_SLIDES_Track04_MethodstoModelMeasureNoiseMitigationwithEmbeddedCapacitorsinHigh-CurrentPDNsforAIClou_107_200.pdf
  - DCON26_SLIDES_Track08_OIFCEI-PAM456Gto224GErrorBurstsSpecificationsContiguousSequenceorNot_71_144.pdf
  - DCON26_SLIDES_Track12_NavigatingtheNewFrontierAGuidetoTestingSiliconPhotonicsHigh-SpeedLinks_179_222.pdf
  - DCON26_SLIDES_Track03_Panel朇POvs.OIOEvolutionorRevolutioninOptical_149_223.pdf
  - DCON26_SLIDES_Track07_ReinventingtheBackplaneWhyAIDemandsanActiveApproach_210_148.pdf
  - DCON26_SLIDES_Track12_AnExperimentalStudyofPCIeTransmitterEqualizationPresetMeasurementMethodsfor64and128GT_274_121.pdf
  - DCON26_SLIDES_Track03_448GbpsChallengesforScale-UpScale-OutApplications_35_99.pdf
  - DCON26_SLIDES_Track07_AdvancingSignalIntegrityforHigh-SpeedSerDesFromPackage-BoardConstraintstoOn-PackageIn_188_156.pdf
  - DCON26_SLIDES_Track07_Evaluationof224G-PAM4Co-PackagedCopperInterconnectsforNext-GenerationEthernet_101_225.pdf
  - DCON26_SLIDES_Track05_PhotonicFabricMemoryLinkforAcceleratedComputing_42_106.pdf
  - DCON26_SLIDES_Track11_AHybridSystem-LevelModelingandSensitivityAnalysisApproachtoImproveICImmunityforInduct_269_130.pdf
  - DCON26_SLIDES_Track07_400GChannelsforAIApplicationsPassiveActiveCopperCableAssembliestoEnableScaleUpScaleOu_212_181.pdf
  - DCON26_SLIDES_Track01_PracticalModelingof3DInterconnectswithHatchedGroundPlanesinSiliconInterposersBridgesF_140_87.pdf
  - DCON26_SLIDES_Track03_DemonstrationofanElectronic-PhotonicCo-DesignCo-SimulationFlowforHigh-SpeedOpticalCom_99_97.pdf
  - DCON26_SLIDES_Track01_448GPackageInterconnectsDesign_285_167.pdf
  - DCON26_SLIDES_Track06_FastSignalIntegritySimulationOptimizationforLPDDR5xat10.7GbpsinAIPC_79_127.pdf
  - DCON26_SLIDES_Track10_AI-DrivenEmulationofPowerSupplyRippleviaHSSJitterAnalysisTIE-BasedSourceIsolationforP_263_182.pdf
  - DCON26_SLIDES_Track01_BeyondOff-chipBandwidthLimitsPI-awareExtendedScaleCacheESCStacked-GPU-HBMModuleforTra_65_93.pdf
  - DCON26_SLIDES_Track05_EnablingHigh-SpeedDie-to-DieInterfaceswithWallstripAStudyonInsertionLossCrosstalkMetr_68_105.pdf
  - DCON26_SLIDES_Track09_OIF448GbpsElectricalSignalingforAIProgress224GbpsUpdateforCEIOn-goingDevelopments_38_212.pdf
  - DCON26_SLIDES_Track04_AnImprovedBroadbandMaterialCharacterizationMethod_49_101.pdf
  - DCON26_PAPER_Track14_HolisticDesignOptimizationof3D-ICPackageSubstrateInterconnectionsinMultiplePowerDomain_197_56.pdf
  - DCON26_SLIDES_Track08_PCIeBackchannelOptimizationFFESamplingSetupTuningforEnhancedEDPerformancewithCompleme_247_146.pdf
  - DCON26_PAPER_Track13_ViaFan-OutDesignsfor448GbpsSIvsTechnology_109_70.pdf
  - DCON26_SLIDES_Track11_CharacterizationandSuppressionofRFICausedbyLPCAMM2StructuralResonanceinCompactLaptops_82_132.pdf
  - DCON26_SLIDES_Track03_448GIsCopperStillaViableSolutionforIn-chassisConnections_241_206.pdf
  - DCON26_PAPER_Track13_PCBViaPlate-ModeLossInfluenceofViaDesignParameters_73_69.pdf
  - DCON26_SLIDES_Track10_ANovelOff-BoardVerticalPowerSupplySolution_121_134.pdf
  - DCON26_SLIDES_Track02_AnalyzingModelingJitter-InducedCrosstalkAmplificationforHigh-SpeedMemorySystems_113_95.pdf
  - DCON26_SLIDES_Track07_Tutorial朥nderstandingtheViterbiDecoder_25_147.pdf
  - DCON26_PDFPanel朠oweringtheFutureAIsRoleinNext-GenerationPowerIntegritySolutionsBroadAspirational_127_177.pdf
  - DCON26_SLIDES_Track07_NextGeneration448GbpsSERDESPackageLongReachChannelsEnd-to-EndLinkSimulationAnalysis_172_157.pdf
  - DCON26_SLIDES_Track09_PAM6vs.PAM8朼FewConsiderationsMore卂85_168.pdf
  - DCON26_SLIDES_Track07_BreakingBarriersin448GbpsSerialLinksBandwidthESDLinearityChallengesinHigh-OrderPAMSys_137_149.pdf
  - DCON26_SLIDES_Track06_IBIS-AMIModelingforBi-directionalD2DLinksWithClockForwardingEchoCancellation_139_185.pdf
  - DCON26_SLIDES_Track08_Tutorial朌esignVerificationforHigh-SpeedIOsat10to112224Gbps448GbpswithJitterSignalInt_221_228.pdf
  - DCON26_SLIDES_Track06_AnalyticalDerivationofPNSkewsinCoupledChannelsImpacton400GPAM6SerDes_50_109.pdf
  - DCON26_SLIDES_Track08_ImprovingSpectralEfficiencybyOptimizingSub-NyquistEqualizationfor448Gbps_125_143.pdf
  - DCON26_SLIDES_Track07_Panel朤heCaseoftheClosingEyes200GLane400GLaneAIHardwareHavetheopticsalreadywonTheImpa_45_194.pdf
  - DCON26_SLIDES_Track03_EnergyEfficiencyinAIApplications朚akingSenseoftheMultipleRequirements_21_193.pdf
  - DCON26_SLIDES_Track07_BreakthroughsinPCBTechnologyforPCIe7.0Interconnects_171_150.pdf
  - DCON26_SLIDES_Track01_DistributedCapacitorCharacterizationforAdvancedPackaging_143_86.pdf
  - DCON26_SLIDES_Track06_TopSideInterconnectEnablingforPCIe7.0Beyond_279_119.pdf
  - DCON26_SLIDES_Track06_ANovelElectricalLoopbackApproachfor224GLaneNetworking1.6TIOPortsPerformanceValidation_48_227.pdf
  - DCON26_SLIDES_Track04_FromCopperSurfaceMicroroughnesstotheFullTransmissionLineAComprehensiveMultiscaleModel_18_104.pdf
  - DCON26_SLIDES_Track03_OptimizingHostOutputTP1aEqualizationSignalTuningforLinearOpticalLinksin106112GbLinear_191_100.pdf
  - DCON26_SLIDES_Track08_PAM4MeasurementsThroughLossyChannels朩hyOscilloscopeCDREmulationMatters_270_145.pdf
  - DCON26_SLIDES_Track07_NewTechniqueforCrosstalkReductioninHigh-DensityPCBs_19_153.pdf
  - DCON26_SLIDES_Track06_HowZeroBiasDiscreteTLVRMaximizesRevenueonProductBoards_33_112.pdf
  - DCON26_PAPER_Track12_ManualMicro-probesforOne-PortPCBCharacterizationwithaSingleTouchdown_234_72.pdf
  - DCON26_SLIDES_Track01_Adv.SoCICPackagingArchitecture_309_90.pdf
  - DCON26_SLIDES_Track04_BeyondRoughnessMeasurementANovelMethodforHigh-FrequencyElectricalCharacterizationofCo_64_103.pdf
  - DCON26_SLIDES_Track02_ModelingStudyofPowerSupplyNoisePSNinServerDDRLinks_184_96.pdf
  - DCON26_PAPER_Track13_PortReferencinginS-ParametersCriticalInsightsYouNeedtoKnow_213_71.pdf
  - DCON26_SLDIES_Track01_SuperchargingSoCPowerIntegritywithSiliconCapacitors_47_91.pdf
  - DCON26_PAPER_Track13_BreakingtheBandwidthBarrierTestFixturesandMethodologiesfor448GbpsDataTransmission_167_63.pdf
  - DCON26_PAPER_Track13_ImpactAnalysisofPackageManufacturingProcessVariationsAcrossDifferentDesignScenarios_164_65.pdf
  - DCON26_SLIDES_Track04_EnhancingLossPerformanceLinePrecisioninUHDIPCBsUsingAdvancedPackagingMaterialsIonBeam_104_169.pdf
  - DCON26_SLIDES_DrivingTowardsaComplete448GEcosystem_310_201.pdf
  - DCON26_PAPER_Track12_MetrologyStatisticalProcessControlTechniquesfor224G448GSkewManagement_129_189.pdf
  - DCON26_PAPER_Track12_NavigatingtheNewFrontierAGuidetoTestingSiliconPhotonicsHigh-SpeedLinks_179_166.pdf
  - DCON26_PAPER_Track14_AcceleratingHigh-SpeedConnectorBreakoutwithPredictiveMachineLearningPhysics-GuidedInsi_46_52.pdf
  - DCON26_SLIDES_Track01_IBIS-AMIModellingMethodologyforSimultaneousBi-DirectionalSBDDie-to-DieChipletConnecti_214_170.pdf
  - DCON26_PAPER_Track12_AI-DrivenEmulationofPowerSupplyRippleviaHSSJitterAnalysisTIE-BasedSourceIsolationforPI_263_75.pdf
  - DCON26_PAPER_Track12_AnExperimentalStudyofPCIeTransmitterEqualizationPresetMeasurementMethodsfor64and128GTs_274_77.pdf
  - DCON26_SLIDES_LessonsLearnedat224Gbps_293_203.pdf
  - DCON26_PAPER_Track13_MultimodeResonanceSuppressionPAM4EyeDecompositionfor212.5-GbpsOSFP_88_67.pdf
  - DCON26_PAPER_Track10_ModelingMeasuringLargeSignalPDNCrosstalkGroundBouncewithaMulti-PhaseVRMSystemUsingaFas_105_224.pdf
  - DCON26_PAPER_Track11_AHybridSystem-LevelModelingandSensitivityAnalysisApproachtoImproveICImmunityforInducti_269_76.pdf
  - DCON26_PAPER_Track14_FastPDNImpedanceMatrixPredictionforPCBDesignUtilizingLatentSpaceEmbedding_83_55.pdf
  - DCON26_PAPER_Track12_PerformanceCriteriaPracticalImplementationofDe-embeddingTestFixturesfor200GbsPerLaneCo_189_79.pdf
  - DCON26_PAPER_Track08_PCIeBackchannelOptimizationFFESamplingSetupTuningforEnhancedEDPerformancewithComplemen_247_44.pdf
  - DCON26_PAPER_Track12_BridgingtheGapBetweenSimulationMeasurementinDDR5TechniquesforImprovedCorrelation_182_85.pdf
  - DCON26_PAPER_Track13_Near-ChipCopackagedCopperCopackagedOpticsInterconnects_58_164.pdf
  - DCON26_PAPER_Track07_BreakingBarriersin448GbpsSerialLinks_137_33.pdf
  - DCON26_PAPER_Track12_PracticalSemi-AutomatedApproachforSignalIntegrityTestingofHigh-SpeedHigh-DensityCableH_183_83.pdf
  - DCON26_PAPER_Track11_CharacterizationandSuppressionofRFICausedbyLPCAMM2StructuralResonanceinCompactLaptops_82_78.pdf
  - DCON26_PAPER_Track05_EnablingHigh-SpeedDie-to-DieInterfaceswithWallstripAStudyonInsertionLossCrosstalkMetri_68_22.pdf
  - DCON26_PAPER_Track10_ANovelOff-BoardVerticalPowerSupplySolution_121_60.pdf
  - DCON26_PAPER_Track09_AnalysisofHigh-OrderPulseAmplitudeModulationfor400GbsperlaneinEthernetforAI_31_46.pdf
  - DCON26_PAPER_Track03_448GbpsChallengesforScale-UpScale-OutApplications_35_12.pdf
  - DCON26_PAPER_Track08_JitterDecompositionMethodology4-PhaseSkewCharacterizationforHigh-SpeedDRAMInterfaces_76_43.pdf
  - DCON26_PAPER_Track07_NewTechniqueforCrosstalkReductioninHigh-DensityPCBs_19_32.pdf
  - DCON26_PAPER_Track06_TopSideInterconnectEnablingforPCIe7.0Beyond_279_205.pdf
  - DCON26_PAPER_Track06_AComprehensiveElectricalLoopbackApproachfor224GLaneNetworking1.6TIOPortsPerformanceVal_48_24.pdf
  - DCON26_PAPER_Track04_FromCopperSurfaceMicroroughnesstotheFullTransmissionLineAComprehensiveMultiscaleModeli_18_20.pdf
  - DCON26_PAPER_Track12_UncertaintyLoomsLargeImprovingtheAccuracyofStepLoadTesting_54_84.pdf
  - DCON26_PAPER_Track12_AdaptiveScopeNoiseRemovalAPracticalTrade-OffBetweenMeasurementBiasandVariation_90_80.pdf
  - DCON26_PAPER_Track10_HowZeroBiasDiscreteTLVRMaximizesRevenueonProductBoards_33_66.pdf
  - DCON26_PAPER_Track09_PAM6vs.PAM8朼FewConsiderationsMore卂85_51.pdf
  - DCON26_PAPER_Track08_PAM4MeasurementsThroughLossyChannels朩hyOscilloscopeCDREmulationMatters_270_41.pdf
  - DCON26_PAPER_Track07_ReinventingtheBackplaneWhyAIDemandsanActiveApproach_210_30.pdf
  - DCON26_PAPER_Track07_AdvancingSignalIntegrityforHigh-SpeedSerDesFromPackage-BoardConstraintstoOn-PackageInt_188_38.pdf
  - DCON26_PAPER_Track06_APerformanceEvaluationMethodofElectrical-OpticalChannelCouplingfor112G224GLPORTLRBased_114_29.pdf
  - DCON26_PAPER_Track05_BeyondOff-chipBandwidthLimitsPI-awareExtendedScaleCacheESCStacked-GPU-HBMModuleforTran_65_21.pdf
  - DCON26_PAPER_Track09_AdaptiveSerDesPowerScalingforSystemEnergyEfficiencyOptimization_63_45.pdf
  - DCON26_PAPER_Track04_BeyondRoughnessMeasurementANovelMethodforHigh-FrequencyElectricalCharacterizationofCop_64_19.pdf
  - DCON26_PAPER_Track01_SuperchargingSoCPowerIntegritywithSiliconCapacitors_47_8.pdf
  - DCON26_PAPER_Track07_CrosstalkSensitivityNewFindingonPCIe7.0ChannelThroughS-ParameterManipulation_256_34.pdf
  - DCON26_PAPER_Track12_Connector-FreeTerminationforFEXTMeasurementsUsingAbsorbersonBGAPads_233_81.pdf
  - DCON26_PAPER_Track01_448GPackageInterconnectsDesign_285_4.pdf
  - DCON26_PAPER_Track09_SEMIMOSignalingCanitSave400G_84_50.pdf
  - DCON26_PAPER_Track11_TargetedEMIMitigationUsingEmissionSourceImaging3D-PrintedAbsorbers_244_74.pdf
  - DCON26_PAPER_Track08_ImprovingSpectralEfficiencybyOptimizingSub-NyquistEqualizationfor448Gbps_125_39.pdf
  - DCON26_PAPER_Track09_PAMXmYModulationProposalfor448G_89_53.pdf
  - DCON26_PAPER_Track10_BridgingtheTime-FrequencyChasminPDNDesign_206_62.pdf
  - DCON26_PAPER_Track06_LinkDynamicModelingSimulationUsingIBIS-AMIFramework_69_28.pdf
  - DCON26_PAPER_Track09_ModelingTransmitterwithBoostingCapacitorbasedonPlugged-inBehaviorIBIS_166_48.pdf
  - DCON26_PAPER_Track08_AWG-AssistedLowNoisePhysicalChannelDigitalizationfor112GbpsPAM4ITOLJOTLVerification_126_42.pdf
  - DCON26_PAPER_Track05_PhotonicFabricMemoryLinkforAcceleratedComputing_42_23.pdf
  - DCON26_PAPER_Track08_OIFCEI-PAM456Gto224GErrorBurstsSpecificationsContiguousSequenceorNot_71_40.pdf
  - DCON26_PAPER_Track06_IBIS-AMIModelingforBi-directionalD2DLinksWithClockForwardingEchoCancellation_139_27.pdf
  - DCON26_PAPER_Track07_NextGeneration448GbpsSERDESPackageLongReachChannelsEnd-to-EndLinkSimulationAnalysis_172_35.pdf
  - DCON26_PAPER_Track04_EnhancingLossPerformanceLinePrecisioninUHDIPCBsUsingAdvancedPackagingMaterialsIonBeamT_104_186.pdf
  - DCON26_PAPER_Track07_400GChannelsforAIApplicationsPassiveActiveCopperCableAssembliestoEnableScaleUpScaleOut_212_31.pdf
  - DCON26_PAPER_Track04_BreakthroughsinPCBTechnologyforPCIe7.0Interconnects_171_18.pdf
  - DCON26_PAPER_Track03_DemonstrationofanElectronic-PhotonicCo-DesignCo-SimulationFlowforHigh-SpeedOpticalComm_99_13.pdf
  - DCON26_PAPER_Track02_AnalyzingModelingJitter-InducedCrosstalkAmplificationforHigh-SpeedMemorySystems_113_11.pdf
  - DCON26_PAPER_Track06_AnalyticalDerivationofPNSkewsinCoupledChannelsImpacton400GPAM6SerDes_50_25.pdf
  - DCON26_PAPER_Track02_ModelingStudyofPowerSupplyNoisePSNinServerDDRLinks_184_10.pdf
  - DCON26_PAPER_Track03_OptimizingHostOutputTP1aEqualizationSignalTuningforLinearOpticalLinksin106112GbLinearP_191_14.pdf
  - DCON26_PAPER_Track01_Adv.SoCICPackagingArchitecture_309_163.pdf
  - DCON26_PAPER_Track04_MethodstoModelMeasureNoiseMitigationwithEmbeddedCapacitorsinHigh-CurrentPDNsforAICloud_107_16.pdf
  - DCON26_PAPER_Track01_DistributedCapacitorCharacterizationforAdvancedPackaging_143_3.pdf
  - DCON26_PAPER_Track02_Scalingto100TbsSwitchesUsingCo-PackagedConnectors_277_9.pdf
  - DCON26_PAPER_Track04_AnImprovedBroadbandMaterialCharacterizationMethod_49_17.pdf
  - DCON26_PAPER_Track01_IBIS-AMIModellingMethodologyforSimultaneousBi-DirectionalSBDDie-to-DieChipletConnectiv_214_6.pdf
  - DCON26_PAPER_Track01_PracticalModelingof3DInterconnectswithHatchedGroundPlanesinSiliconInterposersBridgesFl_140_7.pdf

请点击导航文件预览

资源包简介：

1、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,20261Modeling Transmitter with Boosting Capacitor based on Plugged-in Behavior IBIS Speaker:Andrew John Marshall(。

2、1IntroductionPort Formation in Field Solvers and the MeaningReferencesExposed ReferencesConclusionsPort Referencing in S-Parameters Critical Insights You Need to KnowTrack 13,Ballroom H Wed,Feb 25,20。

3、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1How to Design Predictable Interconnects up to 448 GbpsYuriy Shlepnev,Simberian Inc.Alex Manukovsky,Intel Is。

4、Welcome to ConferenceFebruary 2426,2026 Santa Clara Convention CenterExpoFebruary 2526,2026 1A Practical Semi-Automated Approach for Signal Integrity Testing of High-Speed,High-Density Cable Harnesse。

5、Welcome to ConferenceFebruary 2426,2026 Santa Clara Convention CenterExpoFebruary 2526,2026 1AI-driven Thermal-aware Data Center Capacity PlanningYixing Li,Cadence Design SystemsYixing Li,Mark Fenton。

6、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1From spooky action at a distance to the quantum InternetJoseph M.LukensPurdue UniversityOak Ridge National 。

7、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Uncertainty Looms Large:Improving the Accuracy of Step Load TestingSeamus Brokaw,(Tektronix)Steve Sandler,(。

8、Welcome to ConferenceFebruary 2426,2026 Santa Clara Convention CenterExpoFebruary 2526,2026 1Via&Fan-Out Designs for 448Gbps:SI vs TechnologyYu Bi(ZTE),Mike Tucker(Shennan Circuit)Xindan Zhang(ZT。

9、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1ADAPTIVE OSCILLOSCOPE NOISE REMOVAL:A PRACTICAL TRADE-OFF BETWEEN BIAS AND VARIATIONKan Tan,Tektronix Inc.2。

10、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1UNDERSTANDING OF TEST FIXTURE DE-EMBEDDING FOR ACCURATE S-PARAMETER CHARACTERIZATION OF HIGH-SPEED INTERCON。

11、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Multimode Resonance Suppression and PAM4 Eye Decomposition for 212.5-Gbps OSFPKewei Song(University of Illi。

12、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Tutorial Synergistic Automotive Controls of Dynamics&Efficiency for Vehicle ElectrificationXUBIN SONG,Z。

13、Near-Chip,Copackaged Copper,&Copackaged Optics Interconnects:Chad Morgan,TE Connectivity FellowKarumbu Meyyappan,TE Connectivity Principal1A Comparison of Socket Optionsfor 224-448 GbpsSPEAKERSCh。

14、Welcome to Welcome to ConferenceConferenceFebruary 2426,2026 Santa Clara Convention CenterExpoExpoFebruary 2526,2026 12Breaking the Bandwidth Barrier:Breaking the Bandwidth Barrier:Test Fixtures and 。

15、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Performance criteria and practical implementation of de-embedding test fixtures for 200 Gb/s per lane confo。

16、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Bridging the Gap Between Simulation and Measurement in DDR5:Techniques for Improved Correlation Lorenzo For。

17、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Connector-Free Termination for FEXT Measurements Using Absorbers on BGA PadsDaniel L.Commerou,Missouri Univ。

18、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Targeted EMI Mitigation Using Emission Source Imaging&3D-Printed AbsorbersVictor Khilkevich,Missouri S&。

19、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,20261Bridging the Time-Frequency Chasm in PDN Design:Leveraging Cumulative Power-Rail Noise and Reverse Pulse Tec。

20、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1PAMXmY Modulation and Coding options for 448GMicrochip TechnologyPeter Graumann(Microchip),Chandra Varanasi。

21、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Jitter Decomposition Methodology and 4 Phase Skew Characterization for High Speed DRAM InterfacesFeb.26,202。

22、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Geoff Zhang (Geoff Zhang ()Hongtao Zhang (Hongtao Zhang ()Peijun Shan (Peijun Shan ()Advanced Micro Devices。

23、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1AWG-Assisted Physical Channel Digitalization for 112 Gbps PAM4 ITOL verificationSijian Yuan,(Ericsson)Nicke。

24、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Printed Circuit Board Via Plate-Mode Loss and Influence of Via Design ParametersSpeaker:Henry Wolf(Mayo Cli。

25、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,20261Impact Analysis of Package Manufacturing Process Variations Across Different Design ScenariosPeter Krotnev,(。

26、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Metrology and Statistical Process Control Techniques for 224G and 448G Skew ManagementRohan Phadke(Arista N。

27、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Manual Micro-Probes for One-Port PCB Characterization with a Single Touchdown Aditya Rao,(University of Col。

28、 Information Classification:General Crosstalk Sensitivity New finding on PCIe 7.0 Channel Through S-parameter Manipulations Diego M Cortes-Hernandez,Intel Corporation, Quresh Bohra,TE connectivity, K。

29、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,20261Benchtop Troubleshooting,Radiated Immunity,ESD and EFTKenneth Wyatt,(Wyatt Technical Services LLC)2Informati。

30、D.BeetnerModeling and Design of ESD Protection2/20/20261Modeling and Design for ESD Protection of High-Speed InterfacesDr.Daryl BeetnerProfessor,Electrical and Computer Eng.,Missouri S&TDirector,。

31、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Stability&More Going Beyond Bode Stability AssessmentSteven Sandler(Picotest)Masashi Nogawa(Monolithic 。

32、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Approved for Public Release:NG26-0136.2026 Northrop Grumman Systems CorporationModeling and Measuring Large。

33、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,20261Holistic Design Optimization of 3D-IC Package Substrate Interconnections in Multiple Power Domain Environmen。

34、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,20261Analysis of High-Order Pulse Amplitude Modulation for 400+Gb/s per lane in Ethernet for AISpeaker：Tongtong W。

35、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1A Performance Evaluation Method of Electrical-Optical Channel Coupling for 112G/224G LPO/RTLR Based on IBIS。

36、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,20261SE MIMO Signaling:Can it Save 400G?Hossein Shakiba(Huawei Technologies Canada)Peter Krotnev(Huawei Technolog。

37、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Accelerating High-Speed Connector Breakout with Predictive Machine Learning&Physics-Guided InsightsKaly。

38、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Enabling 224G/448G Co-Packaged Copper ArchitecturesLuxshare-Tech Dana BergeyChuck GrantCarl YuanAndy NowakT。

39、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Methods to Model and Measure Noise Mitigation with Embedded Capacitors in High Current PDNs for AI and Clou。

40、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1OIF CEI-PAM4 56G to 224G Error Bursts Specifications:Contiguous Sequence or Not?2Masashi Shimanouchi,Altera。

41、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Navigating the New Frontier:A Guide to Testing Silicon Photonics High-Speed LinksMarianne Nourzad,Lightmatt。

42、CPO vs.OIO:Evolution or Revolution in Optical Interconnects?DesignCon 2026February 24,2026 2026 Synopsys,Inc.2Evolution of Interconnect TechnologiesSynopsys Confidential Informationhttps:/ 2026 Synop。

43、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Reinventing the Backplane:Why AI Demands an Active ApproachChristopher Blackburn,Astera Labs2ImageSPEAKERSC。

44、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1An Experimental Study of PCIe Transmitter Equalization Preset Measurement Methods for 64 and 128 GT/s PAM4 。

45、Welcome to ConferenceFebruary 2426,2026 Santa Clara Convention CenterExpoFebruary 2526,2026 1448Gb/s Challenges for Scale Up and Scale Out Applications Halil Cirit,METASunil Priyadarshi(Arista Networ。

46、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 12Track 7.Optimizing High-Speed Serial DesignHansel Desmond DSilva,AmphenolBoris Bakshan,AmphenolSamuel Kocs。

47、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Jie Lin,(Marvell)Principal System Engineer2Evaluation of 224G-PAM4 Co-Packaged Copper Interconnects for Nex。

48、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,20261Power Integrity Design of a 56Gb/s Si-Photonic Optical Link for Memory ApplicationsDan Oh,Marvell(Celestial 。

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