低功耗硬件加速器的混合时间计算.pdf

1、Hybrid Temporal Computing for Lower PowerHardware AcceleratorsMaliha Tasnim,Sachin Sachdeva,Yibo Liu,Sheldon TanVLSI Systems and Computation LabDepartment of Electrical and Computer EngineeringUniversity of California,RiversideOutlineIntroduction and challengeEnergy consummation for Gen AI is fundam

2、ental challenging Review of Temporal Computing and Stochastic Computing The proposed Hybrid Temporal ComputingThe HTC Data CodingThe HTC Multiplication and Addition operations The HTC MAC and 4-bit MAC designExperimental results and discussionsConclusion and takeaway The Growing Energy ChallengeExpo

3、nential growth in computing power demands due to emerging Gen AI.Linear growth in power supply(approx.2%per year).Computing energy consumption projected to double every three yearsNeed for new,ultra-low-energy computing paradigmsCourtesy of SRC The decadal plan for semiconductorsIntroduction to Temp

4、oral Computing and Race LogicTemporal computing is a promising approach for reducing energy consumption.Its rooted in the concept of race logic,where information is encoded in the timing of voltage transitions rather than individual bits.Multiple bits of information can be encoded on a single wire.R

5、ace logic sacrifices some precision but offers advantages in speed,energy efficiency,and reduced area.However pure temporal computing(TC),which uses race logic,struggles with performing general arithmetic operations like multiplication and addition due to causality and waveform format restrictionsTC

6、 for general-purpose computing remains a challenging problem.Despite recent efforts to develop temporal state machines and temporal memory structures,race logic-based design for general computing still remains challengingCourtesy of NIST,In“race logic”information is not encoded in these bits but rat