芯片设计LLM代理.pdf

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1、LLM Agents for Chip DesignHaoxing(Mark)Ren,Director of Design Automation Research,NVIDIA08/25/2024Agent AdvantageLLama3GPT4turbo020406080100Non-agentic41.7%Agentic67.3%(VerilogCoder)Non-agentic60.3%Agentic94.2%(VerilogCoder)Pass1(%)VerilogEval(Human)C.-T.Ho et al,VerilogCoder:Autonomous Verilog Codi

2、ng Agents with Graph-based Planning and Abstract Syntax Tree(AST)-based Waveform Tracing Tool2Agentic ConceptsNon-AgenticAgenticSimple Question LLMAnswerComplex Question PlanningAnswer ToolsMemoryLLMMulti-Agent3Single AgentPlanning Without feedback Chain-of-Thought Tree-of-Thought With feedback ReAC

3、T Self-Reflection4Planning Without FeedbackDesign a RISC-V processor core,follow the following steps:1.define the microarchitecture of the processor.2.give the function specification of each microarchitecture component.3.Implement each function in RTLJ.Wei et al,Chain-of-Thought Prompting Elicits Re

4、asoning in Large Language ModelsImplement a SPARC processor core:The SPARC processor core is divided into 7 main blocks:Instruction fetch unit(IFU),Execution unit(EXU),Load/Store unit(LSU),IFU:The instruction fetch unit(IFU)is responsible for maintaining the program counters(PC)of different threads

5、and fetching the corresponding instructions.RTL code for IFU:Now design a RISC-V processor core:Design a RISC-V processor core.Lets think step by step as a design engineer.Explicit InstructionImplicit InstructionDemonstrative ExamplesChain-of-Thought(CoT):Step-by-step planning with one-shot task dec

6、omposition5Planning Without FeedbackTree-of-Thought(ToT):plan one step at a time,choose best from multiple choices at each step,extend with BFS or DFS,or GraphS.Yao et al,Tree of Thoughts:Deliberate Problem Solving with Large Language ModelsProblemStep 1-1Step 1-2Step 1-3Step 2-1Step 2-2EvaluateChoo