IBM下一代处理器和人工智能加速器.pdf

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1、IBM Telum IIprocessor andIBM SpyreAccelerator chip for AIChris BerryIBM Distinguished Engineer70%of all financial transactions go through an IBM mainframeIBM mainframes run an estimated 70%of all world transactions by value.Source:Operationalizing Fraud Prevention on IBM z16,Celent, in-transaction A

2、I for millions of transactions per secondDPUFor I/O acceleration8-5.5GHz cores10-36MB L2sAI accelerator24 TOPSReduced power for IO management by 70%On-chip Data Processing Unit implements complex I/O protocols and reduces latencyAll projections are based on pre-release hardware measurements and conf

3、igurations and comparisons are made against previous versions of the IBM Telum processor.DPU4 processing clusters8 customized micro-controllers per clusterCoherently connected Connected amongst each other and with the overall cache systemDedicated I/Oacceleration logicQueue manager manages schedulin

4、g and work transfer within the DPUConnects to PCIe off-chip interfacesMassive scale-out I/O subsystemUp to 32Telum II in acoherent SMP system12 I/O expansion drawers with 16 PCIe slotsUp to 192 PCIe cards in a system/8 coresAll projections are based on pre-release hardware measurements and configura

5、tions and comparisons are made against previous versions of the IBM Telum processor.Enhanced Central Compute Complex Branch prediction improvements Rename register growth 128 to 160 Improved store writeback and address translation 20%area reduction 15%power reduction10 L2s 36MB L23.6ns 360MB virtual

6、 L311.5ns 2.8 GB virtual L448.5ns Improved horizontal persistence 30%improvement off-chip bandwidth Drawer-to-drawer encryption40%cache growthAll projections are based on pre-release hardware measurements and configurations and comparisons are made against previous versions of the IBM Telum processo