T5 - Calibration Techniques in PLLs.pdf

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1、SpeakerVideo 2024 IEEE International Solid-State Circuits ConferenceCalibration Techniques in PLLsSalvatore LevantinoChair Professor of Electrical EngineeringPolitecnico di Milano,Italysalvatore.levantinopolimi.itSan Francisco,February 18,2023S.LevantinoCalibration Techniques in PLLs1 of 95SpeakerVi

2、deo 2024 IEEE International Solid-State Circuits Conference Digitally-assisted analog circuits Fundamentals of phase-locked loops Fundamentals of adaptive filtering Calibration examplesS.LevantinoCalibration Techniques in PLLsOutline2 of 95SpeakerVideo 2024 IEEE International Solid-State Circuits Co

3、nference Why to assist or replace analog circuits?To exploit low power and small area of digital gates in scaled CMOSS.LevantinoCalibration Techniques in PLLsDigitallyAssisted Analog Circuits(1 of 2)Inferred from TSMC/Intel reports3nm5nm90nm65nm40nm28nm20nm16nm10nm7nmYearDensity MTr/mm2About 10 x in

4、 transistor density in 10 years3 of 95SpeakerVideo 2024 IEEE International Solid-State Circuits Conference Why to assist or replace analog circuits?To exploit low power and small area of digital gates in scaled CMOSTo correct nonlinear behavior and mismatch of analog circuitsS.LevantinoCalibration T

5、echniques in PLLsDigitallyAssisted Analog Circuits(2 of 2)B.E.Boser,2004SystemIdentificationModulationParametersADCAnalognonlinearityDigitalinverse4 of 95SpeakerVideo 2024 IEEE International Solid-State Circuits Conference Digital assistance Enables minimalistic design of analog circuitsImproves ene

6、rgy efficiency and accuracyS.LevantinoCalibration Techniques in PLLsBenefits of Digitally AssistanceB.Murmann,2006MinimalistADCMinimalistSignal ConditioningDigitalPost-ProcessingMinimalistDACMinimalistSignal ConditioningDigitalPre-ProcessingDigital ProcessingAnalog Media and Transducers5 of 95Fundam