SESSION 2 - Processors and Communication SoCs.pdf

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1、ISSCC 2024SESSION 2Processors and Communication SoCs2.1:A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU subsystem 2024 IEEE International Solid-State Circuits Conference1 of 36A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU Subsystem-Based 5G Mobile SoC Anshul Varma,Sumanth Gururajarao,Hsi

2、nChen Chen,Tao Chen,Gordon Gammie,Hugh Mair,Jen-Hang Yang,Hao-Hsiang Yu,Shun-Chieh Chang,Cheng-Hao Yang,Li-An Huang,Kumar Ramanathan,Ramesh Halli,Efron Ho,Ta-Wen Hung,Sung S.-Y.Hsueh,LiangChe Li,Achuta Thippana,Ericbill Wang,SA Huang2.1:A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU subsystem

3、2024 IEEE International Solid-State Circuits Conference2 of 36Outline Fully OoO Tri-Gear Processor Subsystem Circuit TechnologiesLogic SRAMStandard Cell ImprovementsHigh Bandwidth Voltage ControlDual-Rail EqualizerHardware DVFS with PMIC Passive Discharge Summary2.1:A 4nm 3.4GHz Tri-Gear Fully Out-o

4、f-Order ARMv9.2 CPU subsystem 2024 IEEE International Solid-State Circuits Conference3 of 36CPU SubsystemBoth HP&BP cores upgraded to Cortex-X4OoO Cortex A720 Efficiency core provides 68%power savingTri-Gear CPU Subsystem(ISSCC22#2.5)Fully OoO Tri-Gear CPU Subsystem(Current)Big/LittleAll-Big2.1:A 4n

5、m 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU subsystem 2024 IEEE International Solid-State Circuits Conference4 of 36Single Thread Performance:HP Core15%IPC uplift driving higher single-thread performance-38%power+16%peakperformance HPPeakPerf.Power Iso-Perf.CPU CoreAreaX4(vs.X3)152%(+16%)143%(-

6、38%)174%(+12%)X3131%232%155%A715100%100%100%Dimensity9200/A715(ISSCC22#2.5)as performance/power/area referencePrior(ISSCC22#2.5)Current Work2.1:A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU subsystem 2024 IEEE International Solid-State Circuits Conference5 of 36Single Thread Performance:BP Co