借助 Andes 进入 RISC-V AI 时代.pdf

1、Enter the RISC-VAI era with AndesNiraj DengaleAndes TechnologyTaking Mainstream2ConfidentialSubject to change without notice copyright 2025 Andes Technologymore featuresIntegrated Matrix Ext.(IME)8-core cluster16-core cluster with private L1/L2HVM(High-speed Vector Memory)InterfaceACE for RVVACE(And

2、es Automated Custom Extension)int464,fp1664;bf16(conv.)+bf16(full arithmetic)+fp8VLEN:128512+1024+2048RVV 0.8RVV 1.05-stage single-issue8-stage dual-issue with shared cache for multicore*Future products subject to changeAndes Vector Processor FamiliesAX25-V100NX27VAX45MPVAX47MPV*More features for AX

3、47MPV.CHI-based multi-cluster.RVA23.fp8AX46MPV*Taking Mainstream3ConfidentialSubject to change without notice copyright 2025 Andes TechnologyAndesAIRE:Andes AI Runs EverywhereNN modelsAndesAIRE NNPilotPruning,Quantization,Optimization,EvaluationGenerated C code templateAndesAIRE NN SDKLinux/RTOS Pro

4、cessorsAX65,AX45(MP),AX25(MP)Compute Acceleration CoresVector:NX27V,AX45MPVSIMD/DSP:D25F,D45HW AcceleratorAnDLA I350(32 to 4K int8 MAC)AndeSight IDEGCC/LLVM ToolchainsBuild,debug,profileAnalysis and tuningRTOS&LinuxDevice driversSample codesSimulatorDocumentationNN inference enginesHW/SW Solutions for AI from the Endpoint to the CloudLLVM with Auto-VectorizationAnDLA driverCompute Lib.NN LibraryGenerated NN modelsCustomInstr.ACEScalar&Vector4Thank You!