6575 - Caliptra - Subsystem Firmware Stack.pdf

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1、Chris Swenson,Raghu Krishnamurthy,Bryan Kelly,Bharat PillilliCaliptra Subsystem Firmware StackCaliptra Subsystem Firmware StackChris Swenson,Raghu Krishnamurthy,Bryan Kelly,Bharat PillilliCyber Security&Data ProtectionCaliptra Subsystem Caliptra Core HW/FW+MCU HW/FWEnables Caliptra Integrators to bu

2、ild fully featured RoTCaliptra Subsystem OverviewCaliptra Core 2.0 Security FeaturesML-DSA(with Adams Bridge integration),PQC-aware DICE,AES Engine,Key Vault Extensions for PQC,PCR Signing with PQCCaliptra MCU FeaturesSubsystem Mode Support:AXI DMA Assist,Manufacturing&Product Debug Unlock,UDS progr

3、ammingIntegration of Lifecycle controller&Fuse controllerOCP Streaming boot support over I3CMCU&corresponding HW support for running SoC-specific FW(whose FW is loaded/bootstrapped by Caliptra Core)Caliptra MCU FW built on Caliptra Core 2.0FW released independentlyCaliptra Subsystem FeaturesOpen and

4、 ExtensibleDeveloped openly on GitHubProvided as SDK to build RoT ApplicationsExtensible and customizable by integratorsSecure&SafeFollows established security&isolation best practices Memory Safe Developed in RustConsistentConsistent implementation of Secure Boot,Measured Boot,Attestation,Recovery,

5、Streaming Boot,etc.Standards based:TCG,DMTF,OCP,PCIe CompliantOCP SAFE Audited(planned)Caliptra Trademark(planned)Design Principles of Caliptra Subsystem SDKCombination of Caliptra Core 2.x FW and MCU FWCaliptra Core 2.x provides the security servicesCaliptra MCU provides the RoT services for the So

6、C and PlatformCaliptra Subsystem FW StackCaliptra Core 2.x comprises of consortium-governed ROM,FMC and RuntimeCaliptra Core 2.x provides foundational security features for MCUQuantum-resilient DICEClassical and Post-Quantum Cryptography API supportDebug Unlock supportQuantum-resilient DPECaliptra C