3043 IBM Powers Differentiated Memory Roadmap.pdf

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1、October 21-24,2024Mandalay Bay Convention CenterLas Vegas,Nevada3043William StarkeIBM Distinguished EngineerPOWER Processor Chief ArchitectIBM PowersDifferentiatedMemory Roadmap Copyright IBM Corporation 2024Phases of Processor/System HistoryThe Clock Speed Era1980s20075+GHzThe Multi-core Era100+cor

2、esTodayThe FutureThe Acceleration Era?The Memory Era?(Including Composability)Major Eras in Computing Copyright IBM Corporation 2024The Acceleration Era-Power has Rich Innovation Portfolio here-The industry will see Great Improvement-But the Physics are FriendlierNVLINKPower10In-Core MMAThe Memory E

3、ra(Including Composability)-Power has Strong Leadership Today-For Enterprise Computing and the Acceleration Era,the Lead will Grow-Because the Physics Increase the Gap Extreme Signaling andPackaging TechnologiesPOWER9 and Power10PowerAXON InterfacesMemory Inception ClusteringCentaur BufferOMI Buffer

4、But Which Future Theme is Most Important?Copyright IBM Corporation 2024POWER4 chip(2001)Power10 chip(2021)112x rPerf Growth!140 x CPW Growth!Power E108016 processor chipsrPerf=7998.6CPW=5,266,000Power 690/89016 processor chipsrPerf=71.44CPW=37,40020 Years100 x TransistorsPOWER:Growth in Compute Stre

5、ngth(past 20 Years)Copyright IBM Corporation 2024The Growing Gap:Compute Strength&Memorys Ability to Feed ItGrowth in Compute Strength(Since POWER4)100 x112x140 xTransistorsper ProcessorChiprPerfScoreCPWScoreGrowth in DDR DRAM Bandwidthper unit of Processor Edge Area 28xAbility toFeed Compute16x DDR

6、 Signaling Speed200 3200 MHz1.75x Solder Ball Density29 51 Signals per mm2 Copyright IBM Corporation 2024Typical Industry Server Memoryx86 Multi-core Processorwith up to 8 DDR ports Industry standard DDR DRAM Memory DIMMDIMM Connector(Reliability?)DDR DRAM signal-ended signaling runningfrom processo