10.RISC-V with HW and SW co-design and Custom Compute.pdf

《10.RISC-V with HW and SW co-design and Custom Compute.pdf》由会员分享，可在线阅读，更多相关《10.RISC-V with HW and SW co-design and Custom Compute.pdf（10页珍藏版）》请在三个皮匠报告上搜索。

1、RISC-V with HW/SW co-design and Custom Compute Author:Julian HURISC-V Summit China 20232 2023 Codasip.All rights reserved.Challenge in the market Need to optimize processing to the application Custom ComputeDifficult and risky to do by handUsually takes too longUsually is not optimalRequires large t

2、eamsNo more“free improvements”with end of Moores law3 2023 Codasip.All rights reserved.Benefits of Custom ComputeReduce powerReduce areaFor example,remove companion DSP,compress codeBeat the competitionProtect against copyYour custom processor is uniqueUse older nodesPush boundariesImprove performan

3、ceImprove efficiencyDifferentiate4 2023 Codasip.All rights reserved.Leaders use Custom ComputeVery long and difficultUnderstand the application needsDesign a processorVerify the processorExpensiveNeed to iterateCustom ISACustom SDK(compiler,debugger,)Custom modelNeed large dedicated teamsIf you do i

4、t by handAutomationReady-to-modify IPAt Codasip we make it with:5 2023 Codasip.All rights reserved.Custom compute enabled by two componentsDesign automation toolFast architectural iteration loopProfiling&optimizationCo-simulationResults analysisUsing CodAL high-level languageGenerating custom RTL an

5、d SDKProduction-ready processorsWritten in CodALDesigned for customizationFully RISC-V compliantBest-in-class verificationAlso available as ready-to-use RTLDesign automation tools RISC-V Processor IPs6 2023 Codasip.All rights reserved.IP&tools combinationStart with a standard coreEmbedded and applic

6、ation coresHigh quality,production-readyFully RISC-V compliantDifferentiate with Codasip Studio Configure/ModifyUsing CodAL architecture description language Your application softwareCodasip RISC-Vcustomizable IPIn CodAL high-level languageCodasip StudioProfiling/analysisIA model