由 Arm 主办的“人工智能协同设计：开放标准和生态系统驱动未来基础设施”研讨会上Arm 发表了演讲.pdf

《由 Arm 主办的“人工智能协同设计：开放标准和生态系统驱动未来基础设施”研讨会上Arm 发表了演讲.pdf》由会员分享，可在线阅读，更多相关《由 Arm 主办的“人工智能协同设计：开放标准和生态系统驱动未来基础设施”研讨会上Arm 发表了演讲.pdf（15页珍藏版）》请在三个皮匠报告上搜索。

1、Wongyu Shin,Tech Lead of HW Engineering,RebellionsThomas Mermans,Sr.Director of Business Development Samsung FoundryCo-Desigining for AI:Open Standards and Ecosystems Driving the Future of Infrastructure22025 Rebellions Inc.All rights reserved.Key enabler for next-generation AI innovation Chiplet De

2、sign Co-developing critical components Interoperability&Flexibility Building a robust Chiplet ecosystem with strategic partnersRebellions Chiplet Strategy-SummaryRebellions AI Accelerator Roadmap(Tape-out Schedule)Rebellions AI Accelerator Roadmap(Tape-out Schedule)REBEL-QuadTechnologySF4X(Samsung)S

3、tructure4 ASIC+4 HBM3E+4 ISC*Single Die and Interposer Size(Approximate)320 sqmm/2200 sqmmPackage/Interposer TechnologyICube-S(CoWoS-S type)HBM Bandwith and Capacity 4x HBM3E(12H)4.8 TB/s,144 GBPeak Dense Compute FP8:2 PFLOPSFP16:1 PFLOPSOn-chip SRAM512 MBPCIe Interface2x PCIe Gen5 16 x256 GB/SUCIe

4、Interface4 TB/s UCIe-A3x TB/s channel per ChipletChip TDP600 Watt*ISC=Integrated Silicon CapacitorPeta-scale Compute with 300-600 Watt for InferenceRebellions Chiplet Design StrategyAI Compute ScalabilityCapacityGeneralityMEMMEMMEMIOIOIOCPUCPUCPUCPUI/O Chiplet Expansion for Large Scale SystemExpandi

5、ng The Scalability Heterogeneous chiplet configurationsScale-up within server and racksScale-out over the rack system unitsAll Chiplets are designed by Rebellions(Phase1 approach)Accelerating Chiplet Innovation With Arm Total Design(ATD)Frictionless delivery of Arm Neoverse CSS-based compute chiplet

6、sCollaboration across the global semiconductors supply chainAccelerated deployment of innovative custom siliconIntroduced at OCP Global Summit 2023D E S I G N S E R V I C E S&PA C K A G I N G F O U N D R Y S E R V I C E SF I R M W A R E,E D A&3 R D PA R T Y I PRebellions joins in 2025C O M PA N I O