024--许海波.pdf

1、Leverage BRS standard toimprove RISC-V SW compatibilityHaibo Xu Andrei Warkentin Legal Notices and DisclaimersIntel ConfidentialDepartment or Event NameRISC-V Summit China 2024Statements in this document that refer to future plans or expectations are forward-lookingstatements.These statements are ba

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5、arks are trademarks of IntelCorporation or its subsidiaries.Other names and brands may be claimed as the property ofothers.This document contains information on products and/or processes in development.BackgroundIntel ConfidentialDepartment or Event NameRISC-V Summit China 2024 With the growing of R

6、ISC-V based products,there is a need for a standardized way to ensure interoperability between different RISC-V platforms and OSs Rule of thumb is standardization and conformance test RISC-V BRS specification defined some requirements(based on SBI/UEFI/ACPI/SMBIOS/DT etc.)for Boot and Runtime servic