用于危及生命的室性心律失常检测的 10.60 μW 150 GOPS 混合位宽稀疏 CNN 加速器.pdf

1、1A 10.60 W 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia DetectionASP-DAC 2025Yifan Qin1,Zhenge Jia1,Zheyu Yan1,Jay Mok2,Manto Yung2,Yu Liu2,Xuejiao Liu2,Wujie Wen3,LuhongLiang2,Kwang-Ting Tim Cheng2,Xiaobo Sharon Hu1,Yiyu Shi11University of Notre Dame,2

2、Hong Kong University of Science and Technology/AI Chip Center for Emerging Smart System,3North Carolina State UniversitySpeaker:Prof.Yiyu ShiUniversity of Notre Dame Background Demonstration Design Highlights2Background3 Ventricular arrhythmia(VA)HealthyVA-detected On-device detectionData acquisitio

3、n and detectionLow energy,small chip area,high throughput and speedDemonstrationOn-Board Testing:CNN sparsity:50%Diagnostic accuracy:99.95%Power:10.60 WThroughput:150 GOPSPower density:0.57 W/mm2X 14.23 power density compare with SOTAICD250 Hz sample rateAccelerator0.035 ms/sample Quantized CNNUI fo

4、r user6 samples vote for diagnostic result4Design Highlights Chip Structure Parallel Computing2 input channels:2 Core Elements16 output channels:16 PEs per Sparse PE(SPE)44 output feature map WH:4 Computing Cores4 SPEs per Core Element Details512 PEs in total12 PEs+4 Mixed-PEs(MPEs)in one SPEMixed-P

5、E(MPEs):Conv+Pooling OP.1644 output computing in parallel5Design Highlights Sparse Process Element(SPE)Mixed-bit Signed Reconfigurable Multiplier(CMUL)Single scratch pad(SPad)shares in SPESPE Area BreakdownAreaPowerComputation densityReconfigurable 8/4/2/1-bit multiplicationCompressionSparsity6Thank you!7Further questions please reach out:yshi4/yqin3 at nd.edu