1、RUNoC:Re-inject into the Underground Network to Alleviate Congestion in Large-Scale NoCXinghao Zhua,Jiyuan Baia,Zifeng Zhaoa,Qirong Yua,Xiaofang Zhoua,Gengsheng ChenabaSchool of Microelectronics,Fudan University,Shanghai,China bJiashan Fudan Institute,Jiaxing,Zhejiang Province,China2025.1.22Outline1
2、Introduction2Motivation3RUNoC Architecture4Experiments5Conclusion1Strong Demand for NoCNetwork-on-Chip(NoC)gains considerable attention for its remarkable advantages in scalability and high bandwidth.Typical Network-on-Chip(NoC)RNRNRNRNPPPPPNode(Core,Mem,Acc)RNRouterPortPFig2.Typical NoC architectur
3、e.Fig1.Celerity block diagram1.Introduction21S.Davidson et al.,The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric:Fast Architectures and Design Methodologies for Fast Chips,in IEEE Micro,vol.38,no.2,pp.30-41.Typical Node Architecturea)RouterRoutingthepacketstotheirdestination.b)Netwo
4、rk InterfaceRX:Receiving and analyzing thepackets from network.TX:Transferring the informationinto flits and send them to network.c)ProcessorCPU/Mem/Computing UnitTypical Network-on-Chip(NoC)Fig.Typical node architecture.Introduction3Long Path CongestionExisted Solutiona)Carefully designed routing a
5、lgorithm Self-relief mechanismOften require extra paths and relay on global information,which results in route latency and high resource usageLong Path Congestion in NoCIntroductionFig2.Prolonged path congestion.Fig1.Node congestion.4b)Two-Level Network(TLN)Pseudo-3D topologySymmetric TLN(S-TLN):two
6、 layers have equalsizes,whereeachnodeinonelayerisassociated with a corresponding node in theother layer.AsymmetricTLN(A-TLN):consistsofacomplete network and a sparse network withfewer nodes.Existing architectures have their own lack including power and area consumption,load balancing and deadlock.Ex