FirePower：迈向架构级电源建模的通用知识基础.pdf

1、FirePower:Towards a Foundation with Generalizable Knowledge for Architecture-Level Power Modeling1Qijun Zhang,Mengming Li,Yao Lu,and Zhiyao Xie(Speaker)Hong Kong University of Science and Technologyqzhangcsconnect.ust.hk,eezhiyaoust.hkOutline2IntroductionPower Model FormulationFirePower Framework132

2、Evaluation4Architecture-Level Power ModelPower efficiency is a critical design objective in microprocessor designA high demand for fast,yet high-fidelityarchitecture-level power modelingInput:Hardware parameters,e.g.FetchWidth,DecodeWidth,DCacheWaysEvent parameters,e.g.the number of DCache Miss,Bran

3、ch MispredictionOutput:PowerArch.DesignPowerArch-Level PerfSimulationArch-LevelPower ModelEvent ParamHW Param4Components of CPU CoreThe architecture of our target Out-of-Order RISC-V CPU core5Configuration and Event Parameters Major architecture-level configuration parameters and event:Assume there

4、are N components,for component:1)Hardware parameters denoted as H,with =|1,2)Event parameters denoted as,with =|1,HardwareHAnalytical ModelAnalytical Model Explicitly design separate analyticalmodels for each component For example,the model of ICache is:whereExample:McPAT MICRO09Unreliable accuracyH

5、HHML-based ModelML-based Model The denotes data-driven ML methods denotes the power prediction value Can be formulated below:Example:McPAT-Calib ICCAD21Rely on sufficient dataH ML-based Model:PowerTrain(ISLPED15)McPAT-Calib(ICCAD21)Transfer Learning(ASP-DAC23)Problem of ML-based Model:(1)Unapplicabl

6、e to a different architecture(2)Bad accuracy with limited training dataPrior Works Our another work,PANDA,unifies these two methods Require human-effort,out of the scope of this work PANDA Goal:Target the few-shot learning scenario for new target architecturesE.g.Train on BOOM(known arch),apply to X