SESSION 34 Digital PLLs and Waveform-Shaping VCOs.pdf

1、ISSCC 2025SESSION 34 Digital PLLs and Waveform-Shaping VCOs34.1:A 65fsrms-Jitter and 272dB-FoMjitter,N10.1GHz Fractional-N Digital PLL with a Quantization-Error-Compensating BBPD and an Orthogonal-Polynomial LMS Calibration 2025 IEEE International Solid-State Circuits Conference1 of 45Munjae Chae*1,

2、Seheon Jang*1,Chanwoong Hwang1,2,Hangi Park1,2,and Jaehyouk Choi1(*Equally-Credited Authors)1Seoul National University,Seoul,Korea2KAIST,Daejeon,Korea34.1:A 65fsrms-Jitter and 272dB-FoMjitter,N10.1GHz Fractional-N Digital PLL with a Quantization-Error-Compensating BBPD and an Orthogonal-Polynomial L

3、MS Calibration34.1:A 65fsrms-Jitter and 272dB-FoMjitter,N10.1GHz Fractional-N Digital PLL with a Quantization-Error-Compensating BBPD and an Orthogonal-Polynomial LMS Calibration 2025 IEEE International Solid-State Circuits Conference2 of 45Outline Introduction Challenges in Low-Jitter Fractional-N

4、Digital PLLs Using DTC Problems of Typical Method:Variable-Slope DTC and BBPD Proposed Frac.-N DPLL Using QEC-BBPD and OP-LMS MVC Overall Architecture Quantization-Error-Compensating BBPD(QEC-BBPD)Orthogonal-Polynomial-based LMS Multi-Variable Calibration(OP-LMS MVC)Measurements and Performance Comp

5、arison Conclusions34.1:A 65fsrms-Jitter and 272dB-FoMjitter,N10.1GHz Fractional-N Digital PLL with a Quantization-Error-Compensating BBPD and an Orthogonal-Polynomial LMS Calibration 2025 IEEE International Solid-State Circuits Conference3 of 45Outline Introduction Challenges in Low-Jitter Fractiona

6、l-N Digital PLLs Using DTC Problems of Typical Method:Variable-Slope DTC and BBPD Proposed Frac.-N DPLL Using QEC-BBPD and OP-LMS MVC Overall Architecture Quantization-Error-Compensating BBPD(QEC-BBPD)Orthogonal-Polynomial-based LMS Multi-Variable Calibration(OP-LMS MVC)Measurements and Performance