1、Session 15 Overview:Neural Interfaces and Edge Intelligence for Medical Devices IMAGERS,MEDICAL AND DISPLAYS SUBCOMMITTEENeural recording and decoding circuits continue to improve in terms of precision,robustness,and energy ef ficiency.The first three papers present edge-computing SoCs f or decoding
2、 the neural signals with high ef ficiency and accuracy.The next paper introduces an SoC with advanced wireless communication and power telemetry capability.The final three papers describe reconfigurable,noise-ef ficient and artif act tolerant neural interf ace circuits.Session Chair:Azita Emami Cali
3、f ornia Institute of Technology,Pasadena,CA Session Co-Chair:Taekwang Jang ETH Zurich,Zurich,Switzerland 264 2025 IEEE International Solid-State Circuits Conf erenceISSCC 2025/SESSION 15/NEURAL INTERFACES AND EDGE INTELLIGENCE FOR MEDICAL DEVICES/OVERVIEW979-8-3315-4101-9/25/$31.00 2025 IEEE8:00 AM
4、15.1 A 3.9mW 200words/min Neural Signal Processor in Speech Decoding for Brain-Machine Int erface Tun-Yu Chang,National Taiwan University,Taipei,Taiwan In Paper 15.1,National Taiwan University presents a speech-decoding processor that supports a communication rate of up to 200words/min with power co
5、nsumption of 3.9mW.8:25 AM 15.2 A 1024-Channel 0.00029mm2/ch 74nW/ch Online Spat ial Spike-Sort ing Chip wit h Event-Driven Spike Det ect ion and Self-Organizing Map Clust ering Arash Akhoundi,Delf t University of Technology,Delf t,The Netherlands In Paper 15.2,Delf t University of Technology introd
6、uces a spike-sorting chip that processes 1,024-channel neural signals with area and energy ef ficiencies of 0.00029mm2/ch and 74nW/ch,respectively.10:05 AM 15.5 Event-Based Spat ially Zooming Neural Int erface IC wit h 10nW/Input Reconfigurable-Invert er Fabric and Input-Adapt ive Quant izat ion Jia