Session 36Ultra-High-Density D2D and High-Performance Optical Transceivers.pdf

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Session 36Ultra-High-Density D2D and High-Performance Optical Transceivers.pdf

1、Session 36 Overview:Ultra-High-Density D2D and High-Performance Optical Transceivers WI RELI NE SUBCOMMI TTEEML-driven computing demands higher bandwidth density and improved energy efficiency.High-density die-to-die interconnects with ultra-high-speed silicon photonics solutions can provide low lat

2、ency and wide-bandwidth connectivity with excellent energy efficiency on a chiplet platform.The first three papers in the session will present high-density electrical interconnect solutions whereas the last five papers will focus on different challenges of optical transceivers.The first paper from T

3、SMC reports thehighest beachfront density in 3nm finFET technology.The second paper in the session presents innovative crosstalk and echo cancellation techniques for single-ended signaling.The third paper from Cadence presents UCIe-compliant high-density interconnect over a 2.5D interposer interface

4、 in 3nm FinFET.In the fourth paper,Intel will present thehighest reported speed VCSEL driver and transimpedance amplifier front-end in CMOS technology.In the fifth paper,Xian JiaoTong University presents a low-latency solution for 200Gb/s pluggable optics.The sixth paper in the session introduces se

5、veral circuit techniques to achieve a 112Gb/s PAM-4 linear TIA with 0.61pJ/b energy efficiency.The seventh paper from the University of Illinois at Urbana-Champaign will present a 64Gb/s,16-QAM analog coherent receiver designed for high-speed short-reach optical links.The 8th paper from the Southern

6、 University of Science and Technology will present a 160Gb/s PAM-4 driver with a swing of 3.8Vppd in 130nm SiGe BiCMOS.In the last paper of the session,Marvell will present a 212Gb/s PAM-4 retimer solution in 5nm FinFET technology achieving a swing of 3Vppd with a BW of 54GHz and a TDECQ of 2.04dB w

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