人工智能辅助芯片设计教程.pdf

1、AI-Assisted Chip Design TutorialHotChipsStelios DiamantidisSynopsys Distinguished Architect25 August 2025(c)2024 Synopsys,Inc.AI-driven Optimization for Chip Design1.Motivation Why AI for Optimization2.The Reinforcement-Learning Optimization Paradigm Search spaces,acquisition functions,metrics/KPIs,

2、pareto fronts,learning3.Applications of RL-driven Optimization Physical design,micro-architecture,search-based verification,test,analog,3D exploration4.Augmenting RL with GenAI A World of Opportunity Optionality vs.optimality,evolution of human-compute i/f,data abstractions(c)2024 Synopsys,Inc.Discl

3、aimer This is a technology tutorial Several examples have been drawn from Synopsys research in AI The capabilities presented may not be indicative of Synopsys products For product-related information,please contact Synopsys sales(c)2024 Synopsys,Inc.Motivation Why AI for OptimizationAI-Assisted Hard

4、ware Design Tutorial HotChips 2024(c)2024 Synopsys,Inc.PDK GenerationChip Design:A Near-Infinite Problem SpaceFlowStepsToolSettingsConstraintsGuidesDRCCell DesignStd.CellsLayoutLibrary AttributesTiming,slew,powerProcessProcess AttributesMetal stacks,parasitics,patternsLogicTNSWNSPowerAreaManualAnaly

5、sisFeedback(ad-hoc)PPA MetricsEvaluate transistor choices early in designRe-generate lib filesTLU+Evaluate metal stack choices early in designRe-generate tlu+filesEvaluate design space parameters and constructs/inputsPhysical DesignArea(c)2024 Synopsys,Inc.ClocksLib CellSelectionDTCOMemory ConfigPow

6、er V-ScalingIR DropFloorplan1010 Design Complexity Grows Exponentially104 1014 1025 Leakage106 TNS(c)2024 Synopsys,Inc.Implication of Design ComplexityQuality of ResultThroughputCostDiscontinuous solution spaceNoisy,non-convex,non-differentiableHard to break out of local minimaHard to identify causa