Providing certifiable secure hardware subsystems with anti-tamper mechanisms.pdf

1、Elevating Hardware Securityto a Hardware Root of TrustProviding certifiable secure hardware subsystemswith anti-tamper mechanismsSylvain Guilley,Co-Founder&CTO,Secure-ICProviding certifiable secure hardware subsystems with anti-tamper mechanismsSECURITY AND DATA PROTECTIONSECURITYMULTIDIMENSIONAL TH

2、REATSGlobaloOver clocking,clock glitchesoVoltage glitches,underfeedingoHeatingLocaloElectromagnetic injectionoLaser injectionIntroductionFor a unique goal:provoke a faultIntroduction:adversary goalAnd find a secret information,such as a secret/private keyDigital Sensor Conceptual StructureFully digi

3、tal Quantitative digital sensor :US11893112B2The placement of a sensitive chain is done by calling a single TCL procedure,which requires the following arguments:Sensitive chain instance name,(including the hierarchical path)The absolute x position where the sensitive chain will be placedThe absolute

4、 y position where the sensitive chain will be placedThe coordinates given to the TCL placement procedure,correspond to the lower-left corner of the boundary box of the sensitive chainThe TCL placement procedure returns 4 coordinates that correspond to the protected area were the protected registers

5、shall be placed(respectively lower-left x,lower-left y,upper-right x and upper-right y coordinates)Digital Sensor(DS)tight integration1Example of a sensitive chain after calling the TCL placement procedure,with the protected area(orange):Digital Sensor(DS)tight integration2Methodology allowing to di

6、mension one DS,given design critical path and system clock worst case frequencyCalibrationWithin an iSE(integrated Secure Element),e.g.,of Caliptra typeDeploymentTargets for experiments on DSCharacterization&attack means(Laboryzr tools)Experimental setupsDigital Sensor iso-status