Reworking the Zephyr Clock System.pdf

1、#EMBEDDEDOSSUMMITReworking the Zephyr Clock Control Subsystem Moritz Fischer,G$whoamiEngineering Lead GoogleWorks on firmware for in-house ASICsOpen Source HippieI hate reinventing the wheelWere hiring!I2CUART AUART BSPI ASPI BCPU ACPU BASIC XASIC YASIC ZCPU AI2CUART ACPU BSPI AUART BCPU BCPU BSPI B

2、SPI BWorking on ASICs means re-using IP wherever possibleYou make something that works-suddenly everyone wants to integrate itEvery ASIC integrates IP slightly differentlyI cant rewrite all my firmware everytimeWhy do I care?Bus widths(32 bit/64 bit)Bus typeIP revisionsResetsClockingTypical integrat

3、ion differences(HW)ASIC AFixed PLLUART ARefASIC BUART AFractional PLLCPU ARefProducerConsumerProducerConsumerAll HW needs clocks to runConsumer might need info from/or control over producerExample:UART output divider depends on input clock rateClocks in ASICsASIC AFixed PLLUART ARefASIC BUART AFract

4、ional PLLCPU ARefProducerConsumerProducerConsumer(ideally)Handles dependenciesThe operations are fairly simpleConsumers should not need to know about internals of the ProducerWhat Id expect from a clock APIONOFFSet RateGet RateGet StatusFixed clocksDynamic Clocks(Type A)Dynamic Clocks(Type B)Clocks

5、in Zephyr todayWe dont use the API,we just grab the value using a macroAll compile-timeDifferent producers possible as long as they define clock-frequency in DTClocks in Zephyr today-Fixed Clocksclk0:clk clock-frequency=;compatible=“fixed-clock;#clock-cells=;uart:uart41000000 compatible=“arm,pl011”;

6、.clocks=;ret=pl011_set_baudrate(dev,config-sys_clk_freq,data-baud_rate);.static struct pl011_config pl011_cfg_port_#n=DEVICE_MMIO_ROM_INIT(DT_DRV_INST(n),.sys_clk_freq=DT_INST_PROP_BY_PHANDLE(n,clocks,clock_frequency),PINCTRL_INIT(n);DTDriverUse the API with hardcoded SoC specific dataConsumer drive