HC2022.Google.Pienaar.v1.pdf

1、MLIR FundamentalsHot Chips 34,2022Jacques PienaarGoogle1OutlineBrief MLIR introductionMLIR philosophyWhat you get in the boxQuestions2A collection of modular and reusable software components that enables the progressive lowering of high level operations,to efficiently target hardware in a common way

2、3Multi-Level Intermediate Representation New compiler infrastructureOriginally built by team in TensorFlow ecosystemUnder neutral governance as part of LLVM project4Origin:Many graph compilersNot ideal(old)state322+2+2+15Many broken user journeysLLVM IR has proved itself as a versatile“mid-level”rep

3、resentation similar to C with vectors and SSALLVM IRLLVM:Industry Standard for Compiler Infrastructures6LLVM IR has proved itself as a versatile“mid-level”representation similar to C with vectors and SSALLVM IRMachine IRGlobalISelMC IRLLVM IR is not enough for low-level representationsMultiple lower

4、 levels of abstraction introduced over timeLLVM:Industry Standard for Compiler Infrastructures7LLVM IR is not enough for high-level representationsThere is a huge abstraction gap between ASTs and LLVM IR,covered in a one-shot conversion in Clang.LLVM IRMachine IRGlobalISelMC IRclang ASTC,C+,ObjC,CUD

5、A,OpenCL,.LLVM:Industry Standard for Compiler Infrastructures8Clang has a representation parallel to AST used in,e.g.,static analyzer,various advanced diagnostics.LLVM IRMachine IRGlobalISelMC IRclang ASTC,C+,ObjC,CUDA,OpenCL,.clang CFGLLVM:Industry Standard for Compiler Infrastructures9Some tools(e

6、.g.Polly)resort to raising from LLVM IR to represent higher-level constructs such as loops.LLVM IRMachine IRGlobalISelMC IRclang ASTC,C+,ObjC,CUDA,OpenCL,.ScopInfoLLVM:Industry Standard for Compiler Infrastructures10Newer languages/compilers define custom intermediate representations between AST and