HC2022.SiFive-MSFT.LenharthDemme.v1.pdf

1、Circuit IR for Compilers and ToolsHeterogeneous Compilation in MLIRHot Chips 34 TutorialAndrew Lenharth(SiFive)John Demme(Microsoft)Demo:Creating hardware for MLPyTorch to SystemVerilog with cosimulationMLIR-based tech for HW Design and Verification Composable toolchain for hardware design/EDA proce

2、sses Focuses:High quality,usability,performanceModular library based design to power next-gen ecosystem:Drive an innovation explosion for HW(like LLVM did for SW)LLVM Incubator Project:CIRCT:Circuit IR for Compilers and Toolshttps:/circt.llvm.orgMaking a chip is easy,right?GDSIIFPGASynthesis+SDFP&RH

3、W DesignerSimulationHardware design is a team sport;not one thingVerification Engineers*FormalMethodsGDSIIFPGAsAnalysis Tools(e.g.clock,power domains,etc)EmulationSynthesis+SDFP&RDEFHW DesignerDesign is more than just RTL and testbenchesVerification is a whole set of sub-disciplines,each with their

4、own standardsPhysical DesignerPower Engineer*Approximately to scaleSimulationPervasive redundancy,no single source of truth,little consistencyEach aspect of the design has different(sub-)languagesMany languages are vendor or tool-dependentSpecs are not orthogonal:reuse abstractions(despite poor abst

5、raction capability)Redundancy:multiple sources of truthThese IRs are loosely coupled to the original design intentLong turn around and lots of effort to make changesFragile layeringDesigns become a mess of scripts,TCL,vendor-specific files,and duct-tapeAll aspects of a chip need specificationLots of

6、 interacting tools and development flows!Tools are great,but not as great as they could be!Wonderful ecosystem of tools,but:Not always using best practices in software/compiler engineeringMonolithic designs connected by unfortunate standards like VerilogEach framework/tool/tech stack is its own tech