20230615_C-202_Zhang.PDF

1、FpgaNIC:An FPGA-based Versatile 100Gb SmartNIC for GPUsZeke Wang,Hongjing Huang,Jie Zhang,Fei Wu,Gustavo AlonsoOutline2,What is FpgaNIC?1,Why FpgaNIC?3,How FpgaNIC Performs?Why FpgaNIC?1,Why GPU-centric SmartNIC?2,Why FPGA-based SmartNIC?FpgaNIC is an FPGA-based,GPU-centric SmartNIC for GPU-powered

2、distributed applications.Why FpgaNIC?=Why GPU-centric SmartNIC?1,GPU Consumes Most Network TrafficMore and More2,GPUs Position:WorkerLack of Flexibility GPU dreams to be the boss of network data,rather than a worker of the“CPU”.GPUCPUNICPCIe SwitchRecv(data)GPU_kernel(data)Send(data)CPU code:Left fi

3、gure credit:Amir GholaminMain Reason:GPUs position does not match its role in HPC and AI applications.Why FPGA-based SmartNIC?Arm-basedASIC-basedSperling,https:/ general architecture for various applications 2,Long development cycle for each typeout3,Higher and higher typeout costTX/RX portsNIC swit

4、chARM CPUHost coresDDRStaging 100G network data(2*100Gb25GB/s)already overwhelms the ARM CPU.28GB/snMain Reason:ARM-based and ASIC-based SmartNICs cannot always meet two goals(programmability and performance)concurrently.SmartNICOutline2,What is FpgaNIC?1,Why FpgaNIC?3,How FpgaNIC Performs?What is F

5、pgaNIC?nFpgaNIC(GPU-centric SmartNIC):PCIe Endpoint100Gb CMACFpgaNICOn-NIC ComputingHBM/DDR4Network TransportGPU Communication StackDMAConfigurationGTLB100Gb EthernetONCHW TransportMasterInterfaceSlaveInterfacenTwo Goals of FpgaNIC:qGPU-centric SmartNICqVersatility:Flexible Design Space Exploration

6、around SmartNICFpgaNIC:GPU Communication StacknFpgaNIC(GPU-centric SmartNIC):qGPU communication stack:qEnabling data/control plane offloadingPCIe Endpoint100Gb CMACFpgaNICOn-NIC ComputingHBM/DDR4Network TransportGPU Communication StackDMAConfigurationGTLB100Gb EthernetONCHW TransportMasterInterfaceS