SESSION 26 Wireless Transmitters and Front-Ends.pdf

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1、ISSCC 2025SESSION 26Wireless Transmitters and Front-Ends26.1:A 24GHz Direct Digital Transmitter Using Multiphase Subharmonic Switching PA Achieving 3.2Gb/s Data Rate and-30.8dB EVM in 65nm CMOS 2025 IEEE International Solid-State Circuits Conference1 of 36A 24 GHz Direct Digital Transmitter Using Mu

2、ltiphase Subharmonic Switching PA Achieving 3.2Gb/s Data Rate and-30.8dB EVM in 65nm CMOSSoumya Mahapatra1,Mostafa Ayesh1,Ce Yang1,Mayank Palaria1,Shiyu Su1,2,Aoyang Zhang3and Mike Shuo-Wei Chen11University of Southern California,Los Angeles,CA2University of Waterloo,Waterloo,Canada3Tsinghua Univers

3、ity,Beijing,China26.1:A 24GHz Direct Digital Transmitter Using Multiphase Subharmonic Switching PA Achieving 3.2Gb/s Data Rate and-30.8dB EVM in 65nm CMOS 2025 IEEE International Solid-State Circuits Conference2 of 36Outline Motivation Proposed Multiphase SHS TXBandwidth and Efficiency EnhancementPh

4、ase-shifted SH LO DividerIntegration with Dual-rate Hybrid DAC System ImplementationMultiphase SHS LO GenerationRF Power-DAC and Matching Network Measurement Results Conclusion26.1:A 24GHz Direct Digital Transmitter Using Multiphase Subharmonic Switching PA Achieving 3.2Gb/s Data Rate and-30.8dB EVM

5、 in 65nm CMOS 2025 IEEE International Solid-State Circuits Conference3 of 36Challenges in High-Performance TXModern wireless systems demand TX capable of high data rates,high efficiency and high linearity(or low EVM)Existing TXarchitecturesIdealTX architectureTrade-offEnvelopeEfficiency(%)Data Rate(

6、Gb/s)Data Rate(Gb/s)EVM(dB)Existing TXarchitecturesIdealTX architectureTrade-offEnvelope26.1:A 24GHz Direct Digital Transmitter Using Multiphase Subharmonic Switching PA Achieving 3.2Gb/s Data Rate and-30.8dB EVM in 65nm CMOS 2025 IEEE International Solid-State Circuits Conference4 of 36Existing TX