SESSION 7 Ultra-High-Speed Wireline.pdf

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1、ISSCC 2025SESSION 7Ultra-High-Speed Wireline7.1 A 212.5Gb/s DSP-Based PAM-4 Transceiver with 50dB Loss Compensation for Large AI System Interconnects in 4nm FinFET 2025 IEEE International Solid-State Circuits Conference1 of 43A 212.5Gb/s DSP-Based PAM-4 Transceiver with 50dB Loss Compensation for La

2、rge AI System Interconnects in 4nm FinFETE-Hung Chen*,Henry Park*,Mohammed Abdullatif*,Miguel Gandara,Ahmed ElShater,Amr Khashaba,Shih-Hao Huang,Tsz-Bin Liu,Atharav Atharav,Joonyeong Lee,Qaiser Nehal,Mohamed Megahed,Yusang Chun,Cheng-En Shieh,Vidhan Jolly,SoonWon Kwon,Hsin-Ta Chien,Ke-Chung Wu,Cheng

3、-En Liu,Peng Yan,Po-Jui Li,Chun-Han Chen,Tzu-Shun Lin,Pei-Chieh Liu,Tamer AliMediaTek7.1 A 212.5Gb/s DSP-Based PAM-4 Transceiver with 50dB Loss Compensation for Large AI System Interconnects in 4nm FinFET 2025 IEEE International Solid-State Circuits Conference2 of 43Outlinen Introductionn 212.5Gb/s

4、DSP-Based TransceiverlTransmitterlPLLlReceivern Measurement Results7.1 A 212.5Gb/s DSP-Based PAM-4 Transceiver with 50dB Loss Compensation for Large AI System Interconnects in 4nm FinFET 2025 IEEE International Solid-State Circuits Conference3 of 43Growth of AI Serversn Explosive demand for generati

5、ve AI fuels the growth of AI serversn Generative AI workloads grows requires faster networkingSource:Bloomberg-Intelligences forecasts based on hardware and software data from IDC and 650 Group$Million7.1 A 212.5Gb/s DSP-Based PAM-4 Transceiver with 50dB Loss Compensation for Large AI System Interco

6、nnects in 4nm FinFET 2025 IEEE International Solid-State Circuits Conference4 of 43AI Server Interconnects nAI/ML computations require huge amounts of datalUse multiple GPU clusters to distribute training at scalenData bandwidth and latency for interconnects become critical metricsnAI has become the