SNIA-SDC23-DasSharma-PCIe-7.0-Specification-Bandwidth.pdf

《SNIA-SDC23-DasSharma-PCIe-7.0-Specification-Bandwidth.pdf》由会员分享，可在线阅读，更多相关《SNIA-SDC23-DasSharma-PCIe-7.0-Specification-Bandwidth.pdf（37页珍藏版）》请在三个皮匠报告上搜索。

1、1|2023 SNIA.All Rights Reserved.Virtual ConferenceSeptember 28-29,2021PCIe 7.0 Specification:128 GT/s Bandwidth for Future Data-Intensive MarketsPresented by:Dr.Debendra Das SharmaIntel Senior Fellow and co-GM,Memory and I/O TechnologiesMember,PCI-SIG Board2|2023 SNIA.All Rights Reserved.AgendaIntro

2、duction:Evolution of PCI Express TechnologyPCIe 6.0 and PCIe 7.0 Specifications:A Deep DivePCI Express Technology and StorageForm FactorsOptical-friendly PCIe Technology ComplianceConclusions3|2023 SNIA.All Rights Reserved.Evolution of PCI Express Specification PCIe specification doubles the data ra

3、te every generation with full backwards compatibility every 3 years Ubiquitous I/O across the compute continuum:PC,Hand-held,Workstation,Server,Cloud,Enterprise,HPC,Embedded,IoT,Automotive,AI One stack/same silicon across all segments with different form-factors;a x16 PCIe 5.0 device interoperates w

4、ith a x1 PCIe 1.0 device!PCIe 7.0 specification currently at Rev 0.3 level maturity making good progressPCIe architecture continues to deliver bandwidth doubling for 7 generations spanning 3 decades!An impressive run!(*Flit Mode also enabled in other Data Rate with their respective encoding)4|2023 S

5、NIA.All Rights Reserved.PCI Express Specifications:Speeds and Feeds5|2023 SNIA.All Rights Reserved.Bandwidth Drivers for PCI Express Specifications Device side:Networking(800Gb/s-1.6 Tb/s),Accelerators,FPGA/ASICs,Memory(need more memory b/w)Alternate Protocols(CXLTM,proprietary SMP cache coherency p

6、rotocols for multi-socket servers)on PCIe architecture As compute capability grows exponentially,so does I/O bandwidth Platform already has hundreds of lanes for I/O=speed has to go up But.we need to meet the cost,performance,power metrics as an ubiquitous I/O with hundreds of Lanes in a platformNew