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1、CXL Overview and EvolutionIshwar AgarwalIntelCXL Board of Directors180+Member CompaniesIndustry Open Standard for High Speed CommunicationsConfidential|CXL Consortium 2022CXL Specification Release Timeline3Confidential|CXL Consortium 2022March 2019CXL 1.0 Specification ReleasedSeptember 2019CXL Cons
2、ortium Officially IncorporatesCXL 1.1 Specification ReleasedNovember 2020CXL 2.0 Specification ReleasedQ3 2022CXL 3.0 Specification Release New breakthrough high-speed interconnect Enables a high-speed,efficient interconnect between CPU,memory and accelerators Builds upon PCI Express infrastructure,
3、leveraging the PCIe physical and electrical interface Maintains memory coherency between the CPU memory space and memory on CXL attached devices Enables fine-grained resource sharing for higher performance with heterogeneous processing Enables memory disaggregation,memory pooling and sharing,persist
4、ent memory and emerging memory media Delivered as an open industry standard CXL Specification 3.0 is available now with full backward compatibility with CXL 2.0 and CXL 1.1 Future CXL Specification generations will continue to innovate to meet industry needs with backward compatibility CXL Overview4
5、Confidential|CXL Consortium 2022 Alternate protocol that runs across the standard PCIe physical layer Uses a flexible processor port that can auto-negotiate to either the standard PCIe transaction protocol or the alternate CXL transaction protocols CXL 2.0 and CXL 1.1 align to 32 GT/s PCIe 5.0 CXL 3
6、.0 aligns to 64GT/s PCIe 6.0 and is backward compatibleWhat is CXL?8/18/20225Compute Express Link and CXL Consortium are trademarks of the Compute Express Link Consortium.The CXL transaction layer is compromised of three dynamically multiplexed sub-protocols on a single link:CXL Protocols8/18/20226C