HC2022.XeonDx700.PraveenMosur.FINAL.pdf

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1、August,2022Built for the Edge:The Next-Generation Intel Xeon D 2700&1700 processors Praveen MosurIntel Fellow Intel ConfidentialDepartment or Event Name2Architected for the Edge Native ApplicationsDesigned for Network,Storage,vRAN,AI and IOT edge workload consolidationIntegrated Accelerators and Eth

2、ernet with Flexible Packet ProcessorOptimized for space&power constrained ruggedized environments Intel Xeon D-2700ProcessorIntel Xeon D-1700ProcessorIntel ConfidentialDepartment or Event Name3Compute OptimizationEdge OptimizationComputeScalar and Data ParallelPCIe Gen 4High Bandwidth IOIntegrated E

3、thernet and AcceleratorsMemoryLow Latency/High BandwidthPerformanceSecurityIntegration and Form FactorScalabilityIntel ConfidentialDepartment or Event NameIntel Xeon D-1700 Processor4=multiple lanesUART,LPC,SPI,eMMC 5.1,USB 2.0Intel Xeon D-2700ProcessorEthernetGen2 QATGen3QAT=multiple lanesDDR452.5m

4、m x 45mm BGAUART,LPC,SPI,eMMC 5.1,USB 2.045mm x 45mm BGA8 Ports Ethernet32 Lanes PCleGen 424 LanesPCIe Gen3,SATA or USB3DDR4DDR4DDR48 Ports Ethernet16 Lanes PCleGen 424 LanesPCIe Gen3,SATA or USB3Gen3 QATEthernet“inline”Intel ConfidentialDepartment or Event Name5Intel XeonD-2100 processor(per core)I

5、ntel Xeon D-2700&D-1700 processors(per core)Out-of-Order Window224352In-Flight Loads+Stores72+56128+72Scheduler Entries97160Register Files Integer+FP180+168280+224Allocation Queue64/thread70/thread;140/1 threadL1D Cache32 KB48 KBL2 Unified TLB(STLB)1.5K2KSTLB-IG Page Support161024(shared w/4K)STLB-I

6、G Page Support161024(shared w/4K)Mid-Level(L2)Cache1 MB1.25 MBImproved Front-End:higher capacity and improved branch predictorWider and deeper machine:wider allocation,larger structures and execution resourcesEnhancements in TLBs,single-thread execution,prefetchingEdge optimized capabilities;larger