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DC25_SLIDES_Track07_NextGen224GbpsChipToChipMR_Wu.pdf

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1、Information Classification:GeneralWelcome to ConferenceJanuary 2830,2025Santa Clara Convention Center1ExpoJanuary 2930,2025 Information Classification:GeneralNext Generation 224 Gbps-PAM4 Chip-to-Chip/MR SERDES,Package,Channels,and Link Simulation and AnalysisSpeaker:Hsinho WuAuthors:Hsinho Wu,Mike

2、Li,Masashi Shimanouchi,Itamar Levin,and Ariel Cohen Altera2Information Classification:GeneralImageSPEAKERSHsinho WuPrincipal Engineer,AlteraHDr.Hsinho Wu is a Principal Engineer at Altera Corporation.He presently works on high-speed communication systems IPs.His development and research interests in

3、clude signal integrity,clock and data recovery,equalizations,device and system modeling,simulation techniques,and software architecture.Dr.Wu was a recipient of the 2021 Intel Achievement Award.3Information Classification:General Introduction 200+Gbps C2C/MR Reference Package and Channel Characteris

4、tics OIF-CEI-224G-MR COM Analysis 224 Gbps C2C/MR Waveform-Domain Link Simulations Conclusions and Next StepsAgenda4Information Classification:GeneralIntroduction5Information Classification:General200+Gbps Chip-to-Chip/Medium Reach Links Up to 500 mm reach with up to 1 connectorTrending IL target fr

5、om IEEE 802.3dj and OIF-CEI-224G-MR TFs:bump-bump IL of 35 dB C2C/MR applicationsAttachment Unit Interface(AUI,Ethernet),Connecting host devices to sensors/antennas,data converter,accelerators,in telecom and AI/ML systemsBalancing between BER(pre-FEC COM DER of 5e-6 for OIF-CEI,6.7e-6 for Ethernet,p

6、ost-FEC BER 1e-15),latency(KP and LL-FEC),and power consumption From OIF-CEI 6.0 draft6Information Classification:GeneralC2C/MR Reference Package and Channel Characteristicsat212.5 Gbps and 224 Gbps 7Information Classification:GeneralIEEE 802.3dj and OIF-CEI-224G TFs have established two types of re

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1. **会议与主题**:2025年1月28-30日圣克拉拉会议中心,聚焦224Gbps-PAM4芯片间/中距SERDES、封装、信道与链路仿真分析。 2. **关键性能**: - 信道插入损耗(IL)目标35dB,Class A封装(6dB IL)下90%测试信道达标,Class B(10dB IL)仅50%达标。 - 224Gbps下,COM通过率(Class A/A封装)为82.76%~49.66%,35dB IL限制下提升至84.51%~63.96%。 3. **仿真结果**: - COM(dB)与SERPAM4(-log10)线性相关,拟合公式:SERPAM4 = 0.9987×COM + 2.19。 - LL-FEC RS(272,258)需COM≥4.49dB(95%)或≥6.1dB(100%)才能实现10⁻¹⁵后FEC误码率。 4. **挑战**:Class B封装显著缩减解决方案空间,224Gbps较212.5Gbps性能下降约30%。
**224Gbps SERDES挑战?** **COM与仿真如何关联?** **FEC性能如何优化?**
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