DC25_SLIDES_Track09_PostFECBERAnalysisof200Gbs_Barrie_V2.pdf

1、Information Classification:GeneralWelcome to ConferenceJanuary 2830,2025Santa Clara Convention Center1ExpoJanuary 2930,2025 Information Classification:GeneralPost-FEC BER Analysis of 200 Gb/s Wireline Systems using an FPGA PlatformRichard Barrie,(University of Toronto)Ming Yang,(University of Toront

2、o/Alphawave Semi)Richard Barrie(University of Toronto),Ming Yang(University of Toronto/Alphawave Semi)Hossein Shakiba(Huawei Technologies Canada),Anthony Chan Carusone(University of Toronto/Alphawave Semi)2Information Classification:GeneralSpeakersRichard BarrieUniversity of TorontoRichard.barrieisl

3、.utoronto.caRichard Barrie received his M.A.Sc.degree from the University of Toronto in 2024.His research interests are in system modeling and design for high-speed communications.Ming YangUniversity of Toronto/Alphawave SemiMing.yangisl.utoronto.caMing Yang received his Ph.D.from the University of

4、Toronto in 2024.He works as a systems engineer at Alphawave Semi.3Information Classification:GeneralOutline41.Background2.Motivation3.Existing methods of FEC analysis4.FPGA platform overview5.Case study6.ConclusionInformation Classification:GeneralOutline51.Background2.Motivation3.Existing methods o

5、f FEC analysis4.FPGA platform overview5.Case study6.ConclusionInformation Classification:GeneralBackground6Wireline links facilitate high-speed digital communicationDifferent applications use different communication protocolsEthernet used for inter-datacenter communicationForward error correction(FE

6、C)is used to achieve reliable communication100 Gb/s:End-to-end FEC200 Gb/s:Concatenated FECInformation Classification:GeneralOutline71.Background2.Motivation3.Existing methods of FEC analysis4.FPGA platform overview5.Case study6.ConclusionInformation Classification:GeneralMotivation8Factors that imp