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DC25_SLIDES_Track10_ThermalAnalysisandOptimizedDesign_Bae_V2.pdf

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1、Information Classification:GeneralWelcome to ConferenceJanuary 2830,2025Santa Clara Convention Center1ExpoJanuary 2930,2025 Information Classification:GeneralThermal Analysis and Optimized Design for Power Ground Vias of PMIC in DDR5 DIMMByungjin Bae(Samsung Electronics)Wonji Hwang(Samsung Electroni

2、cs),Wooshin Choi(Samsung Electronics)Young-Chul Cho(Samsung Electronics),Jung-Hwan Choi(Samsung Electronics)Young-Soo Sohn(Samsung Electronics),Sunghoon Chun(Samsung Electronics)2Information Classification:GeneralImageSPEAKERSByungjin BaeSI/PI/EMC Engineer,Samsung E|Byungjin Bae received the B.S.and

3、 Ph.D.degrees in electrical engineering from Ulsan National Institute of Science and Technology(UNIST),Ulsan,South Korea,in 2017 and 2023,respectively.From 2023,he is currently a staff engineers with the Solution Product&Development Team of the Memory Business in the Samsung Electronics,Hwasung,Sout

4、h Korea.His current research interests include EMC,PI,SI,EMI,and ESD for memory products.3Information Classification:General Background&Research Motivation Effects of Patterns and Vias on Temperature of PCBo Pattern 1 Top:Wide Trace,Bottom:Wide Traceo Pattern 2 Top:Wide Trace,Inner:Wide Traceo Patte

5、rn 3 Top:DIMM PGND-Like Pattern,Inner:Wide Trace Thermal Analysis for PGND Vias of PMICo DDR5 DIMM-Like PMIC EVB and Temperature Measurement Setupo Temperature Measurement Results ConclusionOutline4Information Classification:General Explosive increase in demand for the DRAM in the AI server and Data

6、 CenteroA large number of memory products,such as DIMMs,need to be installed in a limited space.oAs the demand for increased DRAM capacity continues to grow,the number of DRAM packages mounted on a single DIMM has been increasing.AI Server,Data Center and Memory Wall5Ref A.Gholami,Z.Yao,S.Kim,C.Hoop

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1. **研究背景**:AI服务器/数据中心DRAM需求激增,DDR5 DIMM中PMIC直接贴装,功率增大(如MRDIMM总电流达30A),90%负载电流经PGND via,导致DCR发热问题。 2. **核心发现**: - 增加PGND via数量可降低DCR(如Pattern 1 via从1增至30,DCR从102.35mΩ降至1.33mΩ)和温度(实测降幅超10℃)。 - DDR5 DIMM-like测试中,via从4增至30,PMIC温度最高降9℃,效率提升0.81%(MRDIMM从77.78%→78.72%)。 3. **设计建议**:PCB布局应优化PGND pattern并增加via(建议≥14),以减少发热,提升PMIC效率和寿命。
PMIC散热瓶颈? DDR5温度如何优化? 地过孔如何降热?
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