DC25_PAPER_Track8_NavigatingTheIntricaciesOfPcie_zahrein_V3.pdf

1、 Navigating the Intricacies of Pcie Gen6 Electrical Performance Bin Yaacob,Zahrein,Altera Kong,Chooi yee,Altera Chng,Claris Jing Wen,Altera Hoang,Thanh,Altera T Kho Boon Hock,Joseph Abstract PCIe Gen 6 marks a significant advancement by introducing Pulse Amplitude Modulation 4(PAM4)signaling,enablin

2、g data rates of up to 64 Gbps.This shift from the traditional Non-Return-to-Zero(NRZ)signaling introduces additional complexities in measurement techniques,distinguishing it from previous PCIe generations.This paper provides a comprehensive examination of IP qualification,with insights from the Elec

3、trical Validation team on calibration procedures,measurement methodologies,and the limitations of transceiver tile IP.Focusing on both Transmitter and Receiver testing for PCIe Gen 6,this study outlines the required compliance with the base PCIe specification 1.Beyond presenting test results,the pap

4、er details the measurement techniques,specific test cases,and the rationale behind conducting these assessments.It further discusses evaluations beyond standard specifications to ensure the robustness of the IP for production readiness.The detailed examination of transmitter and receiver testing hig

5、hlights the critical importance of these test cases in IP qualification.This paper aims to serve as a valuable reference for post-silicon engineers engaged in PCIe Gen 6 physical layer qualification,providing essential guidelines for production-level validation.Author(s)Biography Zahrein Yaacob is a

6、n accomplished electrical validation engineer at Altera,with a deep specialization in validating high-speed I/O that adhere to the most stringent electrical protocol standards.His technical expertise encompasses a wide range of compliance protocols,including OIF-CEI,IEEE,HDMI,DisplayPort,PCI-SIG,and