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DC25_PAPER_Track12_ArbitraryWaveformGeneratorAssistedDigitalization _Yuan_V2.pdf

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1、 Arbitrary Waveform Generator Assisted Digitalization of Physical Channels with Fractional Sampling Rate for SerDes High-Speed Evaluation Sijian Yuan,Ericsson AB Ning Ai,Tektronix AB Gabriel Lorentzson,Ericsson AB Nicke Svee,Ericsson AB Abstract SerDes is a fundamental component for modern telecommu

2、nications systems.Traditional BERT-channel methods in high-speed link analysis have made strides in understanding SerDes-channel performance limits.However,due to limitations like the physical channels feasibility,repeatability,and measurement errors,these methods often encounter challenges in BER p

3、rediction and may exhibit instability during verification such as interference tolerance test.To address these challenges,we have developed the AWG-SerDes RX verification system.By directly connecting the AWG to the SerDes RX and utilizing it to digitize the effects of SerDes TX and PCB channels,we

4、achieve a flexible and rapid BER design verification.Additionally,we have developed a fractional sampling algorithm that effectively extends the sampling rate frequency range of the AWG,enabling accurate injection of random/periodic jitter and noise.This innovative approach significantly enhances ou

5、r understanding of SerDes performance,accelerates the product design cycle,and ultimately contributes to the development of more robust and reliable SerDes/Link systems.Author(s)Biography Sijian Yuan,Signal integrity engineer at Ericsson AB,joined Ericsson in 2018,working with signal integrity analy

6、sis and SerDes evaluation.Sijian received his Ph.D.in microelectronic and solid state from Fudan University,Shanghai,China in 2018.His current areas of expertise and interest encompass SerDes modeling,evaluation,and timing analysis.Ning Ai,works as a field application engineer at Tektronix AB since

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1. **AWG-SerDes验证系统**:通过直接连接AWG与SerDes RX,数字化模拟SerDes TX和PCB通道效应,实现快速BER设计验证,解决传统BERT方法的物理通道可行性和测量误差问题。 2. **分数采样算法**:扩展AWG采样率范围(如55 GSa/s),支持精确注入随机/周期性抖动(如RMS误差<0.5 mUI),提升波形拟合精度(RMS误差随插入损失降低)。 3. **噪声与抖动注入**:可模拟SerDes TX的SNDR(误差<0.2 dB)及正弦抖动(如110 MHz,60 mUI),确保信号真实性。 4. **BER预测准确性**:在PRBS23Q模式下,AWG与BERT系统的BER结果高度一致(插入损失15-27dB内差异微小),且PRBS23Q可合理预测PRBS31Q的BER(误差<0.15 decades)。 5. **应用优势**:支持早期芯片验证、TX EQ优化及量产测试效率提升,无需物理重连,加速产品开发周期。
**AWG如何提升SerDes测试?** ** fractional采样有何优势?** **噪声注入如何影响BER?**
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