DC25_PAPER_TRACK07_IntrapairSkewElectricalDelayCompensation_Zhang_V2.pdf

1、 Information Classification:General Intra-pair Skew Electrical Delay Compensation for PCIe 6.0 Xinjun Zhang,Intel Corporation Wenwu Wang,Intel Corporation Kai Xiao,Intel Corporation Chenghai Yan,Intel Corporation Information Classification:General Weizhe Li,Intel Corporation Jingbo Li,Intel Corporat

2、ion Mo Liu,Ph.D Xiaoning Ye,Intel Corporation Information Classification:General Abstract This paper explores how to do electrical delay compensation for PCB intra-pair skew for PCIe 6.0.It introduces a Compensation Coefficient(CC)to correlate electrical delay with physical length.Through Design of

3、Experiment and Response Surface Method analysis,it is found that the CC remains nearly constant when specific values are set for PCB core thickness and saw-tooth structure height.Additionally,the CC is shown to be insensitive to variations in PCB material,trace geometry,and layer stackup.Two look-up

4、 tables are provided to assist layout engineers in performing electrical delay compensation in the main routing region and the pin-field breakout region,respectively.Author(s)Biography Xinjun Zhang is technical lead in Intel,he received the Ph.D.degree in electrical engineering from Xidian Universit

5、y,Xian China,in 2000.From 2000 to 2004,he served as a Post-doctoral Fellow at Shanghai Jiaotong University and Nanyang Technological University.Since joining Intel Corporation in 2004,he has worked as a Signal Integrity Engineer.His primary research interests include signal integrity,power integrity

6、,EMC modeling,and computational electromagnetics.Wenwu Wang is a signal integrity engineer in Intel Corporation,he received the M.S.degree from Xidian University in 2020 and B.S.degree from the Changchun University of Science and Technology in 2017.His current research interests focus on signal inte