基于二维半导体的纳米电子学：材料、加工和计算方面的进展 - Joon Ki Suh（UNIST）.pdf

1、Acknowledgement“Active”research group at UNISTPrincipal Investigator:Dr.Joonki SuhPostdoc:Dr.Wenxuan ZhuGraduate students:Namwook Hur,Sungyeon Kim,Changhwan Kim,Jeongin Yeo,Hanbin Cho,Mingyu Jang,Seonguk Yang,Jaeeun Kwon,Seunghwan Kim,Youngseok Cho,Gayeon Lee,Changjun ParkUndergraduate students:Jihy

2、eon KimOur research proudly supported byNational Research Foundation of KoreaSamsung Science&Technology FoundationKorea Institute for Advancement of Technology Air Force Office of Scientific Research,USASamsung ElectronicsTokyo Electron Ltd.UNISTKISTMonolithic 3D integration of back-end compatible I

3、CsqMonolithic 3D integration;no wafer bonding requiredBeyond SiliconCore LogicVertically Stacking&Non-volatile Highly dense memory Promising extension beyond 3D stacking!Since all device layers are formed on the same wafer,layer transfer is not required Offers higher spatial efficiency and reduced c

4、onnection complexity as all devices are directly integrated on a single silicon waferRequired research areaBEOL compatible process BEOL compatible process Core LogicHighly dense memoryHighly dense memoryIEEE Micro 39,16(2019)qCore“Material x Processing”for M3D technologyBEOL embedded active layer Lo

5、w temperature growthBEOL compatible process“Materials”Two-dimensional(2D)chalcogenidesAtomically-thin layered semiconductorsDangling-bond-free surface termination“More-Moore”for hyper-scaled logic devicesReversible&durable cycling(HRS LRS)Multi-level storage&neuromorphic hardware“More-than-Moore”app

6、licationsamorphousElemental Chalcogencrystalline“Processing”Vapor-phaseMetal-organic chemical vapor deposition(MOCVD)Atomic layer deposition(ALD)ligand cracking-based reactionScalabilityVersatilityConformalityLow Growth T(400)CrystallinityHighly crystalline film&EpitaxyLimitations in thermal budget&