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OPL4GPT:硬件设计最佳编程语言的应用空间探索.pdf

上传人: 芦苇 编号:651809 2025-05-01 16页 1.59MB

1、OPL4GPT:An Application Space Exploration of Optimal Programming Language for Hardware Design by LLMKimia Tasnia,Sazadur Rahman Department of Electrical and Computer Engineering,University of Central FloridaOutline Motivation Designing an SoC with LLMo Conversational flow to explore the optimal langu

2、age for hardware designo OPL4GPT Framework Modular Prompting and Profiling o One case study-RSA Cryptography Experimental Resultso Experimental Setup o Comparison between C/C+and Verilog code Conclusion2Intro:Emerging Design Automation55%55%5%70%5%70%Hardware0.3%Scripting0.8%HDL Generation55%Verific

3、ation30%Others10%Scripting5%General Programming 78%Others20.9%Survey of 120 Research PapersGitHub Code DistributionPass Rate in HDL codingFunc.SyntaxOpen Source Products Involved Models Llama,Claude,Mistral Synthesis ABC,Yosys Simulation iVerilog Benchmarks OpenCores,RTLLM Evaluation VerilogEval,Hum

4、anEvalEvaluation Metrics Syntactical Correctness Functional Correctness Synthesizability Power,Performance,Area Security and Trustability ScalabilityOSE Activities Open-source benchmark management External IP developer feedback Community user engagement Sustainable human-on-the-loop Hardware design

5、by non-STEM users Bridge gap to enter electronics industryOpenHDLOpen BenchmarkIP ContentDeveloperCommunity DrivenOrganizational GovernanceEvaluation MetricsDevelopment ToolsDistributed EffortBridge Gap to Indsutry3 LLM is showing promising results to advance automated HDL generation Existing works

6、remain applicable mostly to Verilog code generation However,LLM generated codes are falling short to meet syntax/functionality.Requires multiple iterations to debug and converge to the optimal code55%55%5%70%5%70%Hardware0.3%Scripting0.8%HDL Generation55%Verification30%Others10%Scripting5%General Pr

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本文介绍了OPL4GPT项目,探索使用大型语言模型(LLM)生成硬件设计的最优编程语言。研究集中在SoC的设计上,通过对话流程探索LLM在生成Verilog(RTL)和C++(HLS)代码的能力。研究指出,尽管LLM在硬件描述语言生成上显示出潜力,但生成的代码在语法和功能性上仍有不足,需要多次迭代才能达到最优代码。文章通过一个RSA加密案例研究展示了该框架,比较了C/C++和Verilog代码。结果显示,在数学和算法密集型设计(如RSA)以及涉及推理、流水线和平行电路的应用(如CNN、AI加速器)中,C++优于Verilog。在处理器和外围设备等有限状态机的设计中,C++也能达到与Verilog相竞争的性能。研究还发现,LLM在生成硬件代码时,可以利用更高层次的抽象。未来工作将探索更好的提示工程技术和微调LLM以生成HDL代码。
"LLM在硬件设计中的表现如何?" "C/C++和Verilog在硬件设计中的优劣比较" "OPL4GPT框架如何助力硬件设计自动化?"
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