F3 - Digitally Enhanced Analog Circuits_Trends & State-of-the-art Designs.pdf

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1、ISSCC 2024Forum 3Digitally Enhanced Analog Circuits:Trends&State-of-the-art Designs 2024 IEEE International Solid-State Circuits ConferenceForum 3:Digitally Enhanced Analog Circuits:Trends&State-of-the-art DesignsInternational Solid State Circuit ConferenceFebruary 22nd,2024Start of presentations at

2、 8:15amISSCC 2024 Forum 3 Introduction1 of 6 2024 IEEE International Solid-State Circuits ConferenceOrganizer:Ben Calhoun,University of California,Charlottesville,VA Co-Organizers:Visvesh Sathe,Georgia Institute of Technology,Atlanta,GA Jiawei Xu,Fudan University,Shanghai,China Jeff Walling,Virginia

3、 Tech,Blacksburg,VA Masum Hossain,Carleton University,Ottawa,Canada Yan Lu,University of Macau,Macao,China Champions:Makoto Nagata,Kobe University,Kobe,Japan Man-Kay Law,University of Macau,Macau,ChinaOrganizing Committee2 of 6ISSCC 2024 Forum 3 Introduction 2024 IEEE International Solid-State Circu

4、its ConferenceGeneral Information 3 of 6ISSCC 2024 Forum 3 Introduction8 talksEach 40-45 minute talk will be followed by a Q&A period2 coffee breaks and one lunch breakElectronic copies for Forums are available for downloadPlease switch your mobile devices to muteRemember to fill out the speaker eva

5、luation using the ISSCC appNo panel session at the end of the Forum 2024 IEEE International Solid-State Circuits ConferenceForum Topic4 of 6ISSCC 2024 Forum 3 IntroductionTraditional all-analog circuits consume large area,power,and design time in advanced technology nodes and are highly susceptible

6、to process,voltage,and temperature(PVT)parameter variations.Digital circuits with analog functionality or digitally assisted analog circuits help to mitigate these challenges.Digital circuits require less area and power,offer fast time-to-market,provide greater tolerance to PVT variations,and enable