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Retimer芯片在服务器主板中的应用
Retimer芯片在服务器主板中的应用
行业数据
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图片大小：471KB
图片尺寸：1206*816
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所属报告：
澜起科技-从细分冠军走向平台型公司-20220407（44页）.pdf
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PCIe5.0 数据传输速率提升至 32GT/s，按照 PCIe5.0 标准规范，端到端允许的信道损耗预算为 XXdB，若信号传输距离超过 9 英寸，信道损耗便会超过规范值。但目前服务器中仍存在较多 PCIe 插槽与 CPU 距离超过 9 英寸，因此，业内提出在将 Retimer 芯片作为服务器主板的标准配置。假设正式在 PCIe5.0 世代推广成为标准，根据 IDC 报告，2025 年全球服务器出货量预计达到 1710.6 万台，假设 PCIe5.0 渗透率为 30%，一个服务器主板需要配置3 颗 16 链通道的 Retimer 芯片，我们预测 2025 年 PCIe5.0 Retimer 需求达到 82,111 万链路，对应市场规模约 44,340 万美元。
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