马世能-人工智能驱动的超大规模中介层电源网络优化.pdf

1、2025 ANSYS,Inc.AI-Driven Optimization for 2.5D Interposer PDN DesignShineng Ma1,2,Leqi Li1,Bin Yu1,2,GuangYao Li1,2,Keqing Ouyang1,2,Yongsheng Guo3,Yahui Li3,Li Zou3(1.Department of Packaging and Testing,Sanechips Technology Co.,Ltd,Shenzhen 518055,China;2.State Key Laboratory of Mobile Network and

2、Mobile Multimedia Technology,Shenzhen 518055,China;3.Ansys,Shanghai,China)Agenda0102Background&Challenges03Methodology&Workflow04Sensitivity Analysis05OptimizationConclusionBackground&Challenges Chiplet market grow up2.5D/3D Chiplet system(from IMEC presented in 2021 IEDM)Power integrity challengesA

3、doption:35%CAGR in 2.5D packaging(2023-2028)TDP Surge:300W systems face 30%IR Drop degradationSources:ANSYS,Paolo Gargini,ITRS Past,Present and Future,TSMC:Physical Design Challenges and Innovations,ISPD 2017Traditional Design Challenges Navigating this high-dimensional design space demands:(1)Requi

4、re custom design and simulation automation flow(2)Intelligent sampling strategies to effectively search design space(3)Careful AI model selection for OptimizationDesign space complexity,exhaustive exploration impracticalUltra-large-scale interposers designCross-domain PI complexity(SOC Interposer Pa

5、ckage PCB interactions)Traditional approach:Manual P&R+long PI LoopReality:long iterations+random trials+basic comparisons(take more than 2 weeks)Low exploration coverage&Very conservative Guidelines(cost)(not sure if it is the best design)Improve Product Design by OptiSLangManualCAE ProcessIndividu

6、al runs,manual“What if?”Process IntegrationIn parametric Ansys platforms or optiSLang GUIAutomatedCAE ProcessSensitivity Design UnderstandingOptimizationDesign ImprovementRobustnessDesign QualityAI Based Robust Design OptimizationOptimize design performanceEnsure product QualityInvestigate sensitivi