1、 Determining the Requirements,Die vs.Package vs.Board:Multi-level Power Distribution Network Design John Phillips,Cadence Shirin Farrahi,Cadence Kristoffer Skytte,Cadence Ethan Koether,Amazon Joseph Hartman,Oracle Mario Rotigni,retired mario.rotigniieee.org Istvan Novak,Samtec P a g e 2|27 Abstract
2、System design engineers face increasingly difficult power distribution network(PDN)design targets,with varying design and hardware delivery dates for chips,packages,and PCBs.Ensuring a functional PDN under these conditions is challenging.This paper explores PDN requirements at the chip,package,and P
3、CB levels,offering guidelines to understand tradeoffs and solutions.The paper introduces an updated target impedance methodology that varies with frequency and spatial position for shared PDNs.Two power delivery strategies are examined:single point-of-load PDNs and PDNs feeding multiple parallel loa
4、ds.The required bandwidth(BW)of the PDN response depends on the supply network location.The paper aims to correlate BW changes with major PDN components from the DC source to silicon.It highlights that impedance requirements differ across the system due to spatial filtering effects.Power integrity e
5、xperts must decide whether to combine power rails or provide separate power for each device.Using a high-power processor-based server system,the paper measures and simulates power rail impedance at various PDN points.The findings offer guidelines to avoid over-designing PDNs and to understand consid
6、erations for complex multi-load power deliveries.Authors Biography Ethan Koether is a Senior Signal Integrity and Power Integrity Engineer with Amazon Project Kuiper.Prior to this,he spent seven years at Oracle as a hardware engineer in the volume server space.Ethan earned his BS in Electrical Engin