1、 Information Classification:General Investigation of Pin Field Crosstalk Degradation due to PCB Manufacturing Variation Amy Luoh,Intel C Xiaoning Ye,Intel C Vijay Kunda,Intel C Kuan-Yu Chen,Intel Corp.kuan- Chenghai Yan,Intel C Information Classification:General Abstract As demand of high-performanc
2、e AI designs grows,higher pin count of the processers and denser layout and faster IO channels are required.These requirements present challenges for high-speed signal breakout from CPU or GPU pin fields,leading to longer breakout lengths,dense routing,tighter spacing between signals,and traces ofte
3、n routed along the edge of the antipad.PCB manufacturing process variations,such as layer-to-layer mis-registration,drilling,and etching inconsistencies,can expose portions of high-speed traces to the antipad region,significantly degrade crosstalk performance.This paper reports extensive measurement
4、s and electrical simulations to identify key factors affecting crosstalk.Finally,high-resolution 3D X-ray analysis reveals the insights of as-manufactured pin field routing.Information Classification:General Author(s)Biography Amy Luoh is currently a Technical Lead at Intel Corporation.She received
5、the B.S.and M.S.degree in electrical and computer engineering from Oregon State University.She has been working as a signal integrity engineer in server group at Intel since 2005.She leads test board designs,performs routing reviews,PCB material studies and signal integrity and power integrity relat
6、ed simulations and measurements for the server board designs.Xiaoning Ye is currently a Sr.Principal Engineer at Intel Corporation,working on signal integrity of high-speed interconnects in Server systems.He received his Bachelor and Masters degrees in electronics engineering from Tsinghua Universit