DC25_PAPER_Track13_CascadedPackageToPCBChannel_Peng_v2.pdf

1、 Information Classification:General Cascaded Package to PCB Channel Simulation Method Considering Different High-speed 3D Interconnect Models Extended to Higher Bandwidth up to 75 GHz Zhekun Peng,Missouri University of Science and Technology pengzhemst.edu Chaofeng Li,Missouri University of Science

2、and Technology clf83mst.edu Junyong Park,Missouri University of Science and Technology junyongparkdankook.ac.kr Sathvika Bandi,Missouri University of Science and Technology sbgnkumsystem.edu Santosh Pappu,Meta Platform Information Classification:General Granthana Rangaswamy,Meta Platform Xu Wang,Met

3、a Platform Srinivas Venkataraman,Meta Platform DongHyun(Bill)Kim,Missouri University of Science and Technology dkimmst.edu Information Classification:General Abstract High-speed channel interconnect modeling and cascaded simulation methods extended to higher bandwidth up to 75 GHz are proposed to si

4、mulate the high-speed channels from packaging to PCB to support higher data rates and increasing Nyquist frequencies.The method is capable for evaluation of 224 G/lane PAM4 and higher data rates with higher number of pulse amplitudes application.Cascading methodology is proposed to mainly reduce the

5、 complexity of simulating the full channel for faster evaluation with acceptable accuracy by selecting appropriate segmentation planes and ports.Together with modeling for high-speed 3D interconnects among silicon die,package substrate and PCB for the evaluation of the entire channel,such as the C4

6、bump,solder ball and intra-connections.The methodology is validated through the performance of simulation results based on S-parameters and TDR.Different scenarios of packaging,including co-package copper application,are used to validate the proposed method.The theory of cascading methodology to sup