DCON26_SLIDES_Track05_EnablingHigh-SpeedDie-to-DieInterfaceswithWallstripAStudyonInsertionLossCrosstalkMetr_68_105.pdf

1、Welcome to ConferenceFebruary 2426,2026Santa Clara Convention CenterExpoFebruary 2526,2026 1Enabling High-Speed Die-to-Die Interfaces with Wallstrip:A Study on Insertion Loss and Crosstalk Metrics with a Novel Transmission Line StructureStephen Newberry,Chipletz,Inc.Ching-Ping Wong,Chipletz,Inc.Vict

2、or Kronberg,Chipletz,Inc.2SPEAKERSStephen NewberrySI/PI Engineer,Chipletz,IStephen Newberry received his B.S.degree in electrical and computer engineering(ECE)from Rutgers University,New Brunswick,NJ,USA in 2015 and his M.S.degree in electrical engineering(EE)from the University of Idaho,Moscow,ID,U

3、SA in 2024.Prior to his B.S.degree,he was an Electricians Mate with the U.S.Coast Guard.He has held various roles in hardware design and signal integrity engineering,most recently as a Signal and Power Integrity Engineer at Chipletz3Victor KronbergPackage Design Engineer,Chipletz,IVictor Kronberg is

4、 an electrical engineer specializing in IC package design.He holds a masters degree in electrical&computer engineering(ECE)from the University of Colorado Boulder(2021)and multiple bachelors degrees from the University of Texas at Austin(2014).Prior to joining Chipletz as an IC package design engine

5、er,he was a field applications engineer at Siemens EDA(formerly Mentor Graphics)Ching-Ping WongSI/PI Fellow,Chipletz,Inc.ching-Ching-Ping Wong earned his Master of Science degree in Electrical Engineering at Mississippi State University in 1996.He started his career at Intel in RTL design engineerin

6、g;then detoured into MCM package layout engineering at AIC Microelectronics before returning to Intel as I/O transistor-level circuit designer.He then worked as a microprocessor circuit designer during the height of the dot-com era at Santa Clara,California before returning as an I/O circuit designe