SESSION 14 Compute-In-Memory.pdf

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1、ISSCC 2025SESSION 14Compute-In-Memory14.1:A 22nm 104.5TOPS/W-NMC-IMC Heterogeneous STT-MRAM CIM Macro for Noise-Tolerant Bayesian Neural Networks 2025 IEEE International Solid-State Circuits Conference1 of 55A 22nm 104.5TOPS/W-NMC-IMC Heterogeneous STT-MRAM CIM Macro for Noise-Tolerant Bayesian Neur

2、al NetworksDe-Qi You*1,Win-San Khwa*2,Bo Zhang3,Fang-Yi Chen1,Andrew Lee1,Yu-Cheng Hung1,Yi-Ming Li1,Yu-Hui Wang1,Chung-Chuan Lo1,Ren-Shuo Liu1,Kea-Tiong Tang1,Chih-Cheng Hsieh1,Yu-Der Chih4,Tsung-Yung Jonathan Chang4,Meng-Fan Chang1,21National Tsing Hua University,Hsinchu,Taiwan2TSMC Corporate Rese

3、arch,Hsinchu,Taiwan3TSMC Corporate Research,San Jose,CA4TSMC,Hsinchu,Taiwan14.1:A 22nm 104.5TOPS/W-NMC-IMC Heterogeneous STT-MRAM CIM Macro for Noise-Tolerant Bayesian Neural Networks 2025 IEEE International Solid-State Circuits Conference2 of 55Outline Motivation and Challenges Proposed Schemes in

4、BNN CIM MacroOverview of heterogeneous STT-MRAM CIM macro Self-Compare Write-Termination(SCWT)NMC for-compute and IMC for-compute(N-I)2D Clamping-Voltage Scaling with Sense-Margin Compensation(2D-CVS-SMC)Performance and Measurement Results Conclusion14.1:A 22nm 104.5TOPS/W-NMC-IMC Heterogeneous STT-

5、MRAM CIM Macro for Noise-Tolerant Bayesian Neural Networks 2025 IEEE International Solid-State Circuits Conference3 of 55Motivation of Noise-Tolerant CIM Real world image recognition applicationsConstrained by inference accuracy degradation or misjudgmentsDue to environmental noise noise-tolerant NN

6、 model required!Low InferenceAccuracyExpected:No Left andU-turn Inferenced:No U-turn,No Left-turn,etc.Noised Input ImagesBlockedUnclearBlurredNoised Input Interface(e.g.,Rain,Mud)Real WorldNoise SourceCameraEdge Device InferenceOriginal14.1:A 22nm 104.5TOPS/W-NMC-IMC Heterogeneous STT-MRAM CIM Macro